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Study Of CMOS On-chip Transformer Model And 2.4GHz RF Front-end Design

Posted on:2011-04-06Degree:MasterType:Thesis
Country:ChinaCandidate:J KangFull Text:PDF
GTID:2178330338975855Subject:Circuits and Systems
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With the rapid development of wireless communications, Radio frequency integrated circuits (RFICs) as the core device of the wireless transmission systems are moving towards high performance, high integration, low power and low cost. The CMOS process shows many particular advantages such as high integration (compatible with the process of base band), low cost, and what's more, the performance at high frequency turns out to be well as the size scales down. Those characters promote the study of CMOS RF devices modeling with high precision and CMOS RFIC become the research hotspot.Transformer is one kind of on-chip spiral inductor-like components, which plays a critical role in modern CMOS RFICs. Its applications include constructing LC resonant tanks, impedance matching, balun, isolation, and signal coupling without decreasing voltage swing, etc. Due to the substrate conductivity, on-chip transformer suffers from four kinds of serious parasitic couplings at high frequency: skin and proximity effects, parasitic capacitances between metal windings, capacitive substrate coupling, and inductive substrate coupling. Those coupling effects not only degrade the quality factor (Q) of the component, but also make the modeling work quite difficult. After the detailed analysis of those parasitic effects, a physics-based equivalent lumped-circuit fixed model for on-chip symmetric intertwined transformer is presented in this paper. This model accurately predicts the skin effect and proximity effect of the primary and secondary coils inductance over a wide-frequency range using a ladder'4-element'structure respectively. One transformer loop and two RC networks are used to model the substrate loss related to substrate eddy current loss and capacitive and reactive effect of lateral substrate coupling. Then based on the fixed model, a simplified two ports scalable"1-π"circuit topology was proposed, and we developed a set of analytical formulas to establish a scalable model, which correlates the values of circuit elements with the technology parameters and device's geometric dimensions. Seven transformers were fabricated on a standard 0.18-um 1P6M RF CMOS technology, the simulated results show a good consistency with the tested data, which have verified the accuracy of the proposed models and the reasonability of the scalable rules.Low noise amplifier and down-conversion mixer are key modules of the wireless receiver front-end, their performances affect the sensitivity and dynamic scope of the receiver.Based on the noisy two-port network theory, this thesis analyses four kinds of optimizing methods of common source topology in detail, and have designed two kinds of LNA with different structure. One is a traditional cascade structure but add an additional capacitance Cex, this topology can achieve noise matching and power matching simultaneously at the limited power consumption. The other is a new structure of two stages CS LNA with current reuse and the inter-stage matching network; it can achieve both high power gain and low power. After a brief introduction to the principle of mixer and its performance indexes, the detailed analysis on the gain, noise, linearity and the improved solutions correspond to those indexes are given. According to the tradeoff among those indexes, a current reuse bleeding structure mixer is presented, and the mixer can achieve high convertion gain and low noise figure.All the designs are based on SMIC 0.18um RF CMOS process in this thesis, circuit design,circuit simulation and layout design are completed. the working frequency is 2.4GHz, the LNA's Simulation result shows a power gain of 23 dB, NF is 1.7 dB, S11,S22 are below -30 dB while drawing 2 mA current from a 1.8-V supply voltage. The mixer's simulation result shows that the SSB noise figure is 7.5dB when the IF is 2MHz, the conversion gain is 17dB, the input third-order intercept point is -3.2dBm and the operating current is 6.8 mA. The simulation results indicate that all the designs satisfy the goals.
Keywords/Search Tags:CMOS, Symmetric Intertwined Transformer, LNA, Mixer, Current reuse
PDF Full Text Request
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