Research And Design Of Key Circuits Of Millimeter Wave Phase-Locked Loop In 40-nm CMOS Technology

With the advancement of semiconductor technology and the improvement of transistor performance,millimeter wave circuit integrated circuits have been greatly developed,such as short-range wireless communication and millimeter-wave radar.Due to the low cost and high integration of CMOS technology,millimeter wave circuit design using CMOS technology is becoming the mainstream research direction.As a core module,the millimeter wave frequency synthesizer affects the performance of the system,such as phase noise affecting the recognition capability of the millimeter wave radar and the bit error rate of the communication system.The main work of this thesis is to design key modules in the millimeter wave frequency synthesizer using 40-nm CMOS process.This thesis first analyzes the two different millimeter wave frequency source generation schemes: voltage controlled oscillator(VCO)direct resonance in millimeter wave and low frequency VCO cascade frequency multiplier.Considering the poor performance of millimeter-wave passive devices,if the VCO directly resonates in the millimeter wave,its frequency turning range and phase noise are balanced against each other,and the radar system requirements cannot be met at the same time.So the low frequency VCO cascade frequency multiplier is used to generate the millimeter wave frequency source.The main modules designed in this thesis are LC-VCO,injection-locked frequency multiplier(ILFM),and interface circuit between VCO and ILFM.For the VCO,firstly,the linear time-invariant and linear time-varying phase noise models are introduced to provide direction for phase noise optimization.Secondly,the design of passive components in VCO,the model and parameter extraction of millimeter-wave differential inductors,the design and optimization of the varactor;finally,the phase noise optimization method of various VCOs is summarized.The VCO designed in this thesis uses NMOS cross-coupled,2 bits switched capacitor and varactor frequency modulation structure,the frequency range is 37.2 GHz-42.5 GHz,and the phase noise is-85.53 dBc/Hz@1 MHz.For the ILFM,firstly,the injection mode of different injection locking frequency multipliers is analyzed.And the coupled resonant structure is selected.Secondly,the way to increasing the injection locking frequency multiplier's locking range is analyzed: increasing the maximum Locking angle and optimizing the phase response of the resonant cavity;then analyzing the resonant cavity's phase response of the coupled resonant injection locking frequency multiplier and the condition of the zero-crossing phase plateau phenomenon of the resonant cavity;finally,according to the summary of the coupled resonant ILFM design flow,designed The ILFM.The coupled resonant ILFM locking range designed in this thesis is 70.2-105 GHz,and the maximum output power is-5.3 dBm.The phase noise of the input signal is about 7 dB worse than the input signal,which is close to the theoretical deterioration of 6 dB.