Design Of High Frequency Injection-Locked Frequency Multiplier

With the evolution of process technology, the performance of CMOS device has improved a lot. At the same time, applications in mm-Wave/THz band are sprouting, including802.11ad standard around60GHz, automotive radar at77GHz, mm-Wave imaging at94GHz, and various other applications at higher frequenciencies. Due to the advantage of low cost and high integration density, CMOS is ideal for mass market mm-Wave/THz applications. Therefore, increasingly more researchers are devoted to high frequency CMOS IC design.As a crucial part of high frequency CMOS system, frequency source design consists a significant part of system development effort. Due to the limited gain of active device, and degraded quality factor of passive devices, how to design a low phase noise frequency source with limited power consμmption is becoming ever more challenging.In this thesis, a low power low phase noise W-band frequency source is proposed. The content of the thesis is organized in following sections.(1) Analyzed parasitic’s effect on performance of active device, and investigatedthe relationship between layout and parasitic. Based on the information, an optimization methodology was introduced for transistor layout, with a high-frequency parasitic extraction procedure provided.(2) Designed the inversion mode MOS varactors and differential inductors used in oscillator, and optimized parameters of transmission lines according to BEOL(back end of line) features, with input and output impedance matching networks implemented with the optimized transmission lines.(3) Based on application scenario, the pros and cons of existing topologies of frequency sources for high frequency applications is analyzed. And a frequency source utilizing injection-locked frequency multiplication was proposed, and the injection-locking range was1.67GHz with a power consumption of12mW from post-layout simulation.