Font Size: a A A

Research And Optimization On Performance And Lifetime Of Non-Volatile Memory Based On Counter-Mode Encryption

Posted on:2020-11-19Degree:MasterType:Thesis
Country:ChinaCandidate:M S YangFull Text:PDF
GTID:2428330590458334Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
As Non-Volatile Memories(NVMs)have great potentials to be candidates for next-generation memory,security is still a serious challenge for using NVMs as main memories.Data encryption and integrity authentication techniques can secure NVMs from adversaries but incur significant performance and lifetime degradations.We manage the data encryption counters like the morphable counter design and propose a more efficient metadata organization method,called Co-Counter.To reduce the overheads incurred by extra memory accesses,Co-Counter treats the encryption counter and subline counter of a data block as a whole and stores them in the leaf node of the integrity tree within a same memory block,so these metadata can be fetched with one extra access,which reduces the performance overheads.And considering the impact of the diffusion property on NVMs' lifetime,Co-Counter logically gathers those bytes that are more likely to be modified concurrently,and re-encrypt them with subline counters.So the bytes that are not modified will not be influenced by the data encryption and the bit flips in the ciphertext can be decreased.In addition,the modified bytes of the ciphertext are distributed in different physical data units of the data block,thus the ciphertext will be written back the Phase Change Memory array in several write units.So we propose an encryption scheme which exploits data mapping,call DEUCE-M.The modified bytes are mapped in the front physical data units of the encryption block in the original order,and the un-modified bytes are mapped in the back of the block.Then the modified bytes can be encrypted and written back together in fewer physical data units,which decreases the latency of write operations.We evaluate our Co-Counter and DEUCE-M in the system simulator respectively.Compared to the baseline design,Co-Counter reduces the IPC overheads introduced by the extra metadata accesses by 56%.Moreover,Co-Counter decreases the bit flips per write from 33.2% to 27.5%.So the impact on NVMs' performance and lifetime incurred by data encryption techniques can be reduced.Similarly,compared to DEUCE,our DEUCE-M reduces the write latency by 34.9% on average and decreases the bit flips by 26.3% by avoiding the re-encryption of the same write-back data.
Keywords/Search Tags:Non-Volatile Memory, Memory Security, Counter-Mode Encryption, Integrity Authentication, Phase Change Memory
PDF Full Text Request
Related items