Research On Key Technologies Of Non-volatile Memory System With High Performance And Security

The era of big data has produced massive amounts of data,big data applications expose three challenges to the memory system,including intensive computation,information security,and massive data storage.However,traditional memory cannot meet the needs of big data applications,due to its weaknesses such as high power consumption and poor scalability.The emerging non-volatile memory technologies that have many excellent features,e.g.,low power consumption,high density and good scalability,tend to probably solve these problems.However,how to utilize non-volatile memory technology,overcome the shortcomings of non-volatile memory and build a non-volatile memory system with high performance and safety still needs further research.This article focuses on the three challenges of big data applications,and makes research on non-volatile memory systems.The specific research work and innovations are as follows:(1)Accelerator for shift-based convolutional neural networkWe utilize non-volatile memory technologies to deal with the challenge of intensive computation in big data applications.For example,the artificial intelligence applications,their CNNs(convolutional neural networks)contain intensive computation and memory access.Weight quantization is a popular way to reduce computation and memory overhead.Shift-based CNNs,as one of quantized CNNs,converts multiplications into simple shift operations.However,existing CNNs accelerators focus on improving multiplication rather than shift operation,leading to sub-optimal acceleration.Thus,we exploit the natural shift property of DWM(domain wall memory)to devise DWMAcc,a DWM-based accelerator with asymmetrical storage of weight and input data,to speed up the inference phase of shift-based CNNs.DWMAcc supports flexible shift operations to enable fast processing with low performance and area overhead.We then optimize it with zero-sharing,input-reuse,and weight-share schemes.Our experimental results show that,on average,DWMAcc achieves 16.6× performance improvement and 85.6× energy consumption reduction over a state-of-the-art SRAM based design.(2)Efficient counter mode encryption scheme for non-volatile memory systemIn order to protect information security,it is normal to adopting counter mode encryption and AES-based authentication schemes.However,it tends to incur non-negligible performance overhead in order to keep data consistency between counters and user data in non-volatile memory system.In particular,counters are associated with logical addresses such that counters of hot data may overflow frequently,incurring lifetime and performance overhead.Thus,we propose Extra CC to address the performance and lifetime losses in secure non-volatile memory system.We keep an extra counter,which not only keeps the counter locality but also effectively reduces write overhead,hence improving the performance and lifespan.Our experimental results show that it achieves 15.2% performance improvement and 20.5% write traffic reduction.(3)Efficient integrity verification scheme for non-volatile memory systemIn order to deal with challenge of information security in big data applications,secure non-volatile memory system designs demand data persistence on top of traditional confidentiality and integrity protection.A simple adaption of existing secure memory designs would incur non-negligible overheads,including performance degradation,NVM lifetime reduction and energy consumption increase.Thus,we propose Cache Tree to address the integrity verification overhead for secure NVMs.By constructing extra Merkle trees on top of metadata cache,Cache Tree helps to authenticate the volatile cache contents,which enables the adoption of write-back policy and prevents frequent NVM writes in persisting metadata.Our experimental results show that Cache Tree,with less than 0.5% storage overhead,achieves up to 20.1% performance improvement,44.3% lifetime increase and43.7% energy consumption reduction.(4)Non-volatile memory system design with high capacityIn order to deal with the challenge of massive data storage in big data applications,we need to construct a non-volatile memory system with high capacity.Combining DRAM and Flash memory is a promising solution used to tackle the challenges existing in traditional DRAM in terms of energy consuming and scalability.However,in this hybrid memory system,access granularity between the main memory and Flash is inconsistent and general-purpose replacement schemes only focus on high hit rate,hence leading to performance and lifespan overhead.Thus,we propose TBuffer,an additional buffer in DRAM enhanced by history-aware identification and Lazy Flush.History-aware identification can increase hit rate by evicting cold cache lines and keeping more hot cache lines in DRAM,while Lazy Flush can further improve performance and lifespan by delaying flushing dirty objects and reducing writes to Flash.Experimental results have shown that it increases hit rate by up to 12%,reduces the access latency with an average of 19.7%,and achieves 16.6% lifespan improvement.