Design And Research Of Millimeter Wave CMOS Low Noise Amplifier

With the rapid development of wireless communication technology,more and more applications are operating at the millimeter-wave(mm-wave)bands since the scarcity of spectrum resources in the low frequency bands have been occupied.With the development of CMOS technology,the cutoff frequency of transistors have been greatly increased,which makes it possible to design the mm-wave bands circuits with good performance.As the first-stage amplifier of the radio frequency receiver,low noise amplifier(LNA)has great influence on the performance of the receiver,which attracts many domestic and foreign scholars' attention.Passive components become more and more important in the design of LNA.It is important to model and analysis of passive components.The main research contents of this thesis include the following:(1)The circuit performance of several common structures is analyzed,and the topology of the circuit is determined after considering the tradeoffs of each performance.The relationship between the geometric parameters of a single transistor and its maximum gain and minimum noise coefficient is analyzed.The gate width,gate index and DC offset are determined,which makes full preparation for the construction of the circuit simulation.(2)The passive devices are simulated and modeled,which mainly introduce the characteristics of spiral inductor,transformer and balun are introduced in detail.An accurate model is established to analyze the loss mechanism of inductors and transformers,which lays a theoretical foundation for designing accurate and appropriate passive devices.This thesis implements a naval on-chip inductor and an on-chip transformer.Based on the latter,the reconfigurable transformer and on-chip balun are designed.All designs obtain good performance.(3)Finally,two novel low noise amplifiers have been designed based on the TSMC 65 nm CMOS process.The first LNA is a common source stage structure by using fourstage cascaded.The first stage uses source degenerative inductor to reduce noise figure.The matching network consists of spiral inductors and capacitor.Finally,the maximum gain of12.6 dB,the minimum noise figure of 6.8 dB and the well matched input and output at 71-84 GHz can be achieved with a supply voltage of 1.5 V.The first LNA uses more spiral inductors,which results in a larger chip area.The second LNA uses transformers to realize the matching network.The simulation results show that the lowest noise figure can achieve 4.9 dB and the chip area can be reduced.