Study On The Application Of ZnO-high K Composite Dielectrics In The Charge Trapping Memory Devices

Silicon-based semiconductor memory devices are the mainstream of the current memory market,and have been one of the cornerstones of the information society.The charge trapping memory,as one of silicon-based memories,shows good compatibility with traditional CMOS technology,leading to good industrial application prospects.With continuous down-scaling of cell dimension to deep nano-technology,the performances of such devices are gradually approaching their intrinsic physical limits,although3D-architecture may partly retard these challenges.In order to solve these problems,high-k dielectrics are introduced into charge trapping memory devices due to the high relative dielectric constants and wide band-gaps.High-k dielectrics can be used as tunneling layer,charge trapping layer and blocking layer of the devices.At the same time,various laminated structures and composites made of high-k dielectrics have also been extensively studied.The application of high-k dielectrics can improve the density of trapped charges,programming/erasing(P/E)speed,endurance and retention properties of devices.At present,high-k dielectrics are mainly used to improve the charge trapping density of charge trapping memory devices.It is generally believed that the electronic states with high densities at the interfaces of high-k stacks or composites are the key factors that lead to the large charge trapping density of devices.According to the theoretical model of matching energy bands,reducing the offsets of potential energy at the conduction-band minimum between the charge trapping dielectrics and silicon substrate can increase the charge trapping density and programming/erasing speed of the device,and it is proved by the experiments.Therefore the theoretical model of matching energy bands can effectively explain the charge trapping characteristics of the devices.Less study about the effect of the relationship of energy bands between Si and the charge trapping layer on the retention performance of the memory devices has been reported in depth.In most literatures,the conduction-band minimums of high-k composites are higher than that of Si,resulting in a potential barrier formed between Si and high-k composite.But up to now,no charge trapping memory device employing a high-k composite with a lower conduction-band minimum than that of Si as the charge-trapping layer has been fabricated to investigate its retention behavior.We consider that the theoretical model of matching energy bands can explain the retention properties of the devices effectively.The different potential-energy offsets of the conduction-band minimums between the charge trapping dielectrics and silicon substrate can lead to different retention properties of the devices.As shown in earlier literatures,the conduction-band minimums of high-k composites are higher than that of Si,and the shifts in flat-band voltage during the programing process in retention characteristics keep decreasing along with the time,indicating the loss of trapped electrons in the charge trapping layers.According to our theoretical model,if the conduction-band minimums of high-k composites are lower than that of Si,the potential energy offsets between them will drive electrons to tunnel spontaneously from Si substrate to the charge trapping layer,and the density of electrons in the charge trapping layer will increase.Thus,the shifts in flat-band voltage during the programing process in retention characteristic will increase with the time.In addition,if the conduction band minimum of charge trapping dielectrics is near that of Si,the memory window of the retention characteristics will remain unchanged with the time.The virtual crystal approximation theory was used to design the different potential-energy offsets between the conduction band minimums of the charge trapping dielectrics and that of Si,and then deposited high-k composites with different components as the charge-trapping layers in order to demonstrate the theoretical model of matching energy bands.In this work,we fabricated the charge trapping memory devices with ZnO-TiO2 and ZnO-Ta2O5 composites in different component proportions as the charge-trapping dielectrics.We focused on the influence of the different potential-energy offsets between the conduction band minimums of the charge trapping dielectrics and that of Si on the retention characteristics of the devices.The main results are shown below:Devices with ZnO-TiO2 composites as charge trapping dielectrics were fabricated in which the potential energy of the conduction-band minimum of the composite was designed lower than that of Si by the use of the special energy-band offsets among Si,ZnO and TiO2.The component proportions of the charge trapping dielectrics between ZnO and TiO2 in two devices were different.Compared with the conduction-band minimum of Si,a relatively negative potential energy of the high-k composite leaded to a continuous rise in the shift of the flat-band voltage of the memory device except a drop at the beginning part of the time-dependent retention curve after a programming operation.The drop was attributed to the escape of trapped charges at the interface Si/Al2O3,5 and it was demonstrated by the electrical test of Pt/Al2O3/Si device.After extracting the contribution to the deterioration of retention curve from the traps at the interface Si/Al2O3,it was identified that the band alignment in a charge-trapping memory device dominated its retention behaviors.The memory structures Pt/Al2O3/ZnTaO(ZnO-Ta2O5)/Al2O3/Si with different compositions between ZnO and Ta2O5 have been fabricated by using RF-magnetron sputtering and ALD techniques.According to the calculation results based on the virtual crystal approximation theory,the potential energy at conduction-band minimum of ZnTaO-31(ZnO:Ta2O5=3:1)and ZnTaO-11(ZnO:Ta2O5=1:1)dielectrics are all lower than that of silicon substrate,while the potential energy at conduction band minimum of ZnTaO-13(ZnO:Ta2O5=1:3)dielectric is near that of silicon substrate.The curves of retention characteristics showed that the memory windows in the programming process of ZnTaO-31 devices and ZnTaO-11 devices increased with time,and the change of the memory window with time was very small in ZnTaO-13 device.