Study On High K Composite Dielectrics-based Charge-trapping Memory Cells And High-density Metal-insulaotor-metal Capacitors By Atomic Layer Deposition

Semiconductor memories and capacitors are very important information-processing devices in integrated circuits(IC).With the rapid development of IC technology,traditional memories are facing tough challenges such as low storage density,short lifetime,and high power consumption.Simultaneously,traditional polysilicon-insulator-polysilicon(PIP)or metal-oxide-silicon(MOS)capacitors also suffers from serious problems such as parasitic capacitance and poor voltage linearity.Therefore,new types of memories and capacitors have drawn great attention in academic and industry fields.Charge trapping memory(CTM)mainly store the charges in the charge traps of insulating layers which are separated from each other,leading to remarkable advantages of high storage density,low power consumption,long lifetime and low cost.Moreover,the CTM is completely compatible with conventional semiconductor processing,so it is considered to be one of the promising candidates to replace conventional flash memory.High density metal-insulator-metal(MIM)capacitors have attracted great attention due to high-conductivity of metal electrodes,low contact-resistance and parasitic capacitance,and no depletion effect.Therefore,MIM capacitors have become the first choice for next-generation capacitors.Atomic layer deposition(ALD)is a new kind of developing thin film deposition technology with self-limiting and self-saturation reaction mechanism.Due to lots of advantages,such as excellent three-dimensional conformality,large area uniformity,precise sub-monolayer thickness control,and highly compatible with the semiconductor technology,ALD has been widely studied to manufacture high-quality high k thin films.In this thesis,CTM with Ta2O5/Al2O3/TiO2/Al2O3/Ta2O5(TATiAT)nanocomposite dielectrics as storage layers and Ta2O5 nano-islands memory have been fabricated by ALD.The tunneling layer and block layer are both ALD-derived Al2O3 films.Their microstructure,charge storage properties,and energy band alignments have been characterized and analyzed.Meanwhile the MIM capacitors of Zr-Ti-O composite dielectrics have been prepared by thermal ALD and PEALD.The effects of deposition temperature,ALD methods,and Zr sources on the electrical properties of Zr-Ti-O MIM capacitors have been investigated deeply.The main achievements are summarized as follows:1.A charge trapping memory using Ta2O5/Al2O3/TiO2/Al2O3/Ta2O5(TATiAT)as charge trapping layer was fabricated by thermal ALD method.The cross-sectional image of high resolution transmission electron microscopy and X-ray photoelectron spectroscopy depth analyses on the memory cells show that TATiAT dielectric layer forms a nanocomposite high-k oxide.With±10 V sweeping,the memory window can reach 10.0 V with the charge storage density of 1.10×1013 cm-2.The excellent charge storage capability of CTM device is ascribed to more charge defects caused by the interdiffusion in the nanocomposite oxides of TATiAT layer.The device has a fast switching speed.When the applied pulse is 10 ?s,the memory window exceeds 1.0 V;when the pulse is 1 ms,the memory window reaches 2.6 V.The memory cells also show excellent endurance and good retention properties with only 31%charge loss after 10 years.The band alignment of the TATiAT memory indicates that the large conduction band offsets of 1.02 eV between TATiAT and Al2O3 is beneficial to retention characteristic due to the deep trap level.2.The effects of various Si substrate surfaces of-H,-OH,and Al2O3 and different cycles of 20,30,and 40 cycles on the morphology,size,and density of Ta2O5 nano-islands have been investigated deeply.It is found that the surface of Al2O3 has the most abundant active groups(-OH),which facilitates the nucleation and growth of Ta2O5.The area density of Ta2O5 nano-islands is 6.30×1011 cm-2 with 20 cycles,and the average width and height are 9.6 and 1.4 nm,respectively.The CTM memories of Pt/Al2O3/Ta2O5 nano-islands/Al2O3/Si were prepared with different ALD cycles of Ta2O5.The memory cell with 20-cycle Ta2O5 nano-islands exhibits good charge storage capability.The memory window is 5.8 V and the charge storage density reaches 1.11 ×1013 cm-2 at ±12 V sweeping voltage,which is better than the CTM memory of 50-cycle Ta2O5 thin film.The retention characteristic of 20-cycle Ta2O5 nano-islands memory is not as good as that of the TATiAT nano-composite dielectric memory with the about half charge loss of the nano-islands memory after 10 years.The conduction band offset between Ta2O5 and Al2O3 of the Ta2O5 nano-islands memory is 0.86 eV,which is relatively smaller than that of TATiAT ones.Moreover,the size and density of the 20-cycle Ta2O5 nano-islands are larger,leading to agglomeration phenomenon and the deterioration of charge storage performance.3.A series of Zr-Ti-O MIM capacitors were prepared by thermal ALD and PEALD.The effects of deposition temperature,Zr sources,and various ALD methods on the capacitor performances have been investigated deeply.As the deposition temperature increases,the carbon content of the dielectric films decreases gradually,and the voltage linearity ? also shows a decreasing trend.A suitable growth temperature of Zr-Ti-O MIM capacitor is determined to be 300?.The experimental results indicate that the voltage linearity of a value of the MIM capacitors using H2O as oxygen source by thermal ALD is positive,whereas the a value using O2 plasma as oxygen source by PEALD is negative.Two groups of MIM capacitors with ZrCl4 and TEMAZ as Zr sources were fabricated by both thermal ALD and PEALD,in order to reduce a value by the offset effect.It is found that the leakage characteristics of the two group samples have been improved.And the a value of TEMAZ system is reduced significantly with only-102 ppm/V2,which has met the ITRS requirements of MIM capacitors.However,the capacitance density is lower with only 4.1 fF/?m2.Therefore,the process and performance of Zr-Ti-O MIM capacitors still need further optimizing.