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Design Of Visual Break Detection System Based On FPGA

Posted on:2020-04-24Degree:MasterType:Thesis
Country:ChinaCandidate:W X GaoFull Text:PDF
GTID:2428330575954863Subject:Instrument Science and Technology
Abstract/Summary:PDF Full Text Request
Textile is a traditional superior industry in China,but it still lags behind the advanced level in the world.At present,the disconnection detection method used in textile industry still has some problems such as low sensitivity and poor reliability.Based on the development of information technology and computer technology,digital imaging system,this paper puts forward a new kind of visual break line detection system based on FPGA,the CMOS sensor with digital image processing technology of organic integration,can not contact,fast response and accurate detection of cotton in the spinning process of bolt.By retrieving access to existing study,this article break detection method used in the textile industry,we design a using CMOS type industrial camera dynamic break image data acquisition of high resolution,via gigabit Ethernet communication module uploaded to PC in the PC,compared with benchmark cotton quantity,if after a judge found that bolt,PC will be constant alarm detection scheme.In terms of system hardware,it mainly designs the control circuit of industrial camera and the main control circuit of FPGA to realize the control function of FPGA to control the collection,transmission and storage of high-speed video images of industrial camera;DDR3 cache circuit is designed to improve the cache speed of video image signal;The communication interface circuit of gigabit Ethernet is designed to realize high-speed communication between the lower computer and the upper computer;And designed the power module,realize the system hardware module power supply.System software,programming language,using VHDL hardware video acquisition system logic control program was designed,realizing the collection of the FPGA for image control and the function of the preliminary processing,for DDR3,speaking,reading and writing data,for high-speed gigabit Ethernet communication control,and through the simulation platform of ISE to function simulation module,module function is verified;C++ is selected to design the detection algorithm.After completing the software design and hardware assembly,the system is debugged and verified.The test shows that: When the size of the collection window is set to 1280×200 and the frame rate is 60 fps,the visual detection system can judge the broken line with an accuracy rate of more than 95% when the running speed of 0.5mm cotton thread is < 60m/min.
Keywords/Search Tags:industrial camera, FPGA, video image acquisition, data cache, gigabit Ethernet
PDF Full Text Request
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