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High-speed Image Acquisition System Based On Gigabit Ethernet Interface

Posted on:2011-01-06Degree:MasterType:Thesis
Country:ChinaCandidate:Y X LiFull Text:PDF
GTID:2178330332461528Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
With the rapid development of communication and multimedia technology, digital image, especially the video image, has got more and more applications, which also makes more requirements on image acquisition system. And the traditional image acquisition pattern can not be good to meet some special applications, so to design a image acquisition system with high-speed, high-frame and high-resolution becomes a new research subject.Gigabit Ethernet technology has become the mainstream now, which can provide communication bandwidth with 1Gb/s. In a word, Gigabit Ethernet can provide higher data rates and lower latency than Fast Ethernet. It is built on the Fast Ethernet standard, using all the technical specifications the original Ethernet standard provided. Gigabit Ethernet has been widely used in business, government and other departments with its efficient, high-speed, and high-performance features.This paper presents a high-speed image acquisition system design based on embedded Gigabit Ethernet technology, which takes data acquisition, high-speed data transmission and data processing as a whole. It stands at the core position of Xilinx Spartan-3E series XC3S250E FPGA chip. MAC chip AX88180 and PHY chip 88E1111 constitute a platform for Gigabit Ethernet, which realizes network transmission. CMOS digital image sensor is adopted to complete image acquisition. Then the image data is transferred to PC via Gigabit Ethernet, in order to make some corresponding processing.The paper introduces the hardware design first, including the structural characteristics of main chips, and then describes the software realization in detail, which is composed of two parts:network card drivers and image acquisition program. The system takes ISE10.1 for compiling and exploiting environment, implements each module using Verilog HDL. By whole machine debugging, the transmission rate can reach 300Mb/s, the results show that this design meets most requirements of the real-time transmission system and proves to be a practical design with low cost and good stability.
Keywords/Search Tags:Image Acquisition, Gigabit Ethernet, FPGA, AX88180
PDF Full Text Request
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