Design And Implementation Of FPGA High-speed Data Acquisition And Transmission System Based On Gigabit Ethernet

With the rapid development of today's society and the progress of modern science,high-speed data acquisition and transmission system plays an increasingly important role in the field of scientific research and industrial application,such as communication.The acquisition and transmission system collects high-speed data and transmits it to the upper computer.The difficulty lies in the accurate and targeted data collection and transmission.The upgrade of FPGA technology provides a new solution for this problem.According to the requirements of the acquisition and transmission system,the paper analyzes the problems existing in the typical system.Currently widely used acquisition and transmission systems have a wide spectrum of data distribution,low signal-to-interference ratio,amplitude jitter,overload clipping,discrete information distribution,and inability to accurately obtain analysis problems.In the transmission process,there are problems that the data packet loss and can only be transmitted in one direction without interaction.In order to solve the above two types of problems,this paper is based on the research tasks of the laboratory transponder transmission system,in-depth research on the key technologies required,and proposes to increase the analog low-pass filtering,program-controlled automatic gain control,pre-screening of data within the FPGA,retransmissions and configure the system by receiving the host computer instruction package.According to this,the acquisition transmission system is reconstructed.The improved system uses Altera high-performance FPGA as the central control chip,with Gigabit Ethernet as the transmission mode,with analog filter circuit,programmable automatic gain loop,ADC conversion and DDR2 SDRAM storage.The implementation of the system ensures the stable operation of data from acquisition to transmission.After the design framework is clear,the paper completes the circuit design,and carries out simulation verification on the key parts to realize the hardware foundation of the acquisition transmission system.The software part selects the Quartus II platform,uses the Verilog HDL behavioral level description language,adopts the top-down design flow,and performs FPGA control logic algorithm such as amplitude estimation algorithm,gain adjustment,data filtering and demodulation,buffer read/write control,and transmission packet.Finally,according to the requirements,the modules of the system are simulated and tested on the board,verifying the function and determining the performance standards.Because the system has the advantages of configurability,fast and accurate acquisition,large storage capacity,low transmission delay and high stability,it has been successfully applied to the automatic detection of high-speed rail communication.In conclusion,the paper finally realized the design and implementation of FPGA high-speed data acquisition and transmission system based on gigabit Ethernet,which has been put into use and can work stably.