Study On Process Optimization And Reliability Of Resistive Random Access Memory(RRAM) Based On The 28nm Logic Platform

In recent years,with the rapid development of integrated circuit technology,the application scenarios and demand markets of non-volatile memories have rapidly expanded.The study of new non-volatile memories in the research field has also been rapidly developed.The charge-based flash memory which has dominated the non-volatile memory market for more than 20 years,and it has many advantages.But it has the following disadvantages in the new application scenarios and application requirements.For example,it's poor durability(<106 cycles),slow programming speed(>10 ?s),and high operating voltage(>10 V).And at a time when miniaturization is becoming increasingly important and fast decreasing,charge-based flash memory will soon reach the limit of its physical miniaturization.The new type of non-volatile memory has gained wide market attention.Resistive random access memory(RRAM)device,which is based on the concept of resistance change modulated by electrical stimulus,has been considered as one of the most promising candidates for next-generation nonvolatile memory,because of its simple structure,fast switching speed,excellent scalability,three-dimensional(3D)stackable integration,feasibility that be applied to multi-value storage of neural computing,and good compatibility with the current complementary metal oxide semiconductor(CMOS)technology.In recent years,with the further miniaturization of process nodes,RMS has developed rapidly in the new generation of non-volatile memory.However,the reliability of the resistor memory needs to be improved to meet the market demand before the complete product can be sold to customers,such as refine the device tolerance,retention characteristics,and short-term problems.This paper rstly conducts some exploratory experiments in the existing experimental environment,and then explores the non-volatile memory that compatible with the standard CMOS platform on the advanced process node based on 28 nm.It is a breakthrough in the industrialization of new non-volatile memory.There are two points in innovation:Firstly,the 1Mb memory oxidation process was preliminarily explored by using the laboratory experimental platform.The RRAM containing TaON as the resistive layer was prepared by oxidizing Ta with N20 plasma oxygen,which can reduce its forming voltage to less than 2V.Also,an oxidation method compatible with CMOS process was proposed.First,the W plug was oxidized to prepare the lower electrode of WOx/W,improve device volatility between cycles and between devices,fluctuations in the reading process and the uniformity of device parameters.Secondly,the reliability of RRAM array was studied by using a 1Mb resistive memory array.A high-temperature pretreatment scheme is proposed.This scheme reduces the forming voltage value of the device and makes the resistance distribution more uniform.Under the condition of high temperature pretreatment,combined with model Carlo simulation,it is analyzed that Carlo simulation analysis of high-temperature pretreatment improves the tailing effect.The low resistance tailing effect of the storage array after high temperature pretreatment is obviously improved.The high-resistance after a normal temperature reset after high-temperature pretreatment and the high-resistance of normal temperature reset at room temperature are analyzed.The high-resistance tailing phenomenon at room temperature reset after high-temperature pretreatment is significantly reduced.Therefore,high-temperature pretreatment significantly improves the retention characteristics of the memory array.