Research Of Testing Technology On Resistive Random Access Memory

The development of traditional floating nonvolatile memory is facing challenges due to the micro scale of semiconductor process.The new memories based on novel mechanism have attracted the researchers' attention.Among these memories,the resistive random access memory(RRAM)is considered as the one of the most promising non-volatile memory as it shows the advantages of low programmable operation voltage,outstanding speed and ease of integrating on traditional CMOS process.However,there are many obstacles to hinder the practical application of RRAM,such as the unclear the resistive switching mechanism,the unstable performance and the imperfect reliability.Except for developing the device architecture engineering and the circuit design,programming algorithm optimization is also an useful approach to improve the stability and reliability of RRAM.In order to investigate the reliability of RRAM,we need to measure the memory cells in array,and then optimize the programming algorithm based on the lots of measurement results.Therefore,the test technique of RRAM is very important for the memory application.The research in this paper mainly focuses on the test technology of the resistive memory.On the one hand,it explores the influence of different operation schemes on the performance of the devices;on the other hand,built-in-self-test circuit is designed for the functional faults existing in the new type of resistive memory chip.The details are as follows:1: Based on C/C++ language,the program for testing resistive memory array is implemented,including leakage test,static current test,device endurance test,uniformity test,data retention characteristic test and so on.The influence of different pulse voltage and pulse time on the success rate of Forming,Set and Reset is studied.The area of memory array is divided and the shmoo test is realized.The test conditions are 90.The best programming condition of Forming,Set,Reset are quickly and effectively extracted by using success rate as reference standard.In the endurance test,we studied the influence of pulse width and pulse height step on the success rate of the device cycle operation,and further explored the effect of pulse height step on the uniformity of the device.Then,through different programming methods,the device is operated to high and low resistance states,and the data retention characteristics of the device under different operation modes are studied.2: The test result analysis and processing tool is developed based on the script language such as Python,Perl,VBA,to realize the automation of data processing.3: The fault primitive of the resistive memory is established based on the functional fault performance of the resistive memory.Because of the similar logic representation of resistive memory faults,this paper presents a fault identification expression,which describes the steps and methods of Reading and writing operations to detect each fault.Based on March algorithm,three improved test algorithms are proposed on the premise of fault coverage.The design of each module in the built-in-self-test circuit is completed.Through the simulation experiment,it is proved that the self-testing circuit can locate the fault accurately.