Research And Design Of Capacitive Sensor Based On Sigma-delta Modulation

Capacitive sensors are widely used in the measurement of temperature,humidity,pressure,location and ingredients,including the fields of biomedicine,automotive electronics and so on.Capacitive sensor usually includes a front-end sensing element and a capacitance interface circuit.Since the sensing element does not consume static power,the main power consumption of the capacitive sensor comes from the interface circuit.And with the development of capacitive sensor,the capacitance value to be measured may be on the order of pF or even smaller,so that the study of the capacitance interface circuit is of great significance.In this paper,a capacitance-to-digital-converter(CDC)based on sigma-delta modulation is designed.The CDC system framework contains sensing capacitor Cx and a sigma-delta modulator,wherein the sensing capacitor Cx is directly used as the sampling capacitor of the first stage of sigma-delta modulator to realize capacitance to digital conversion.In this design,sigma-delta modulator is the core block of the CDC,which adopts the third-order CIFF topology structure.An ideal system model is constructed through Matlab software.In the consideration of the output swing of each integrator,the gain coefficients in modulator are reasonably determined by formula iteration and software simulation.As for behavioral simulation,the non-ideal factors such as kT/C thermal noise and finite op-amp DC gain are fully taken into account,which lays the foundation for the MOS-based circuit-level implementation.In the circuit level,in order to make up for the design of small reference capacitance of 0.4pF,compensation capacitor Coff is driven with a voltage of opposite polarity as that of sensing capacitor CX,so that the effective capacitor of CDC is regarded as CX-Coff,namely "zoom-in" technique.This technique relaxes the requirements of the sigma-delta modulator.To expand capacitance measurement range,sensing capacitor CX consists of seven binary weighted capacitors,while the compensation capacitor Coff consists of eight binary weighted capacitors,which are controlled by corresponding digital signals.In sigma-delta modulator,current-starved OTAs are used to improve the current efficiency.The auto-zeroing technique is adopted to cancel the input offset voltage of OTAs.The comparator includes a preamplifier and a dynamic latch,which achieves fast and accurate comparison.Based on Cadence IC615,the pre-simulation,layout design and post-simulation of the whole circuit blocks are realized.This design is tape-out successfully based on SMIC 0.18μm process.The effective area of the chip is 0.496mm2.The chip-test system consists of LabVIEW,a DAQ Board and Matlab software,which is used to collect and process output data.In this design,the sampling frequency of CDC is 250KHz and the modulator consumes 18.6μA from a 2V power supply.The modulator achieves SNR of 74.15dB by FFT analysis on chip's output stream,and the quality factor FOM is 7.26pJ/step.When the reference capacitance of 0.4pF,by changing the setting of Coff,the sensing capacitance can range from 0 to 8pF.A good linearity is achieved about the CDC's equivalent input and output.