Font Size: a A A

Study And Design Of Low-power Sigma-delta Circuit

Posted on:2017-05-19Degree:MasterType:Thesis
Country:ChinaCandidate:M Q ZhongFull Text:PDF
GTID:2348330512970688Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the growing demand of audio ADC and the requirement of lower power consumption and higher precision,the design of low power and high precision audio sigma delta modulator has a great significance.Sigma delta mainly used oversampling and noise shaping techniques to obtain higher accuracy which was at the expense of speed.Before designing,we conducted an investigation in the relevant research work at home and abroad.Then according to the reality of the research conditions and foundation,we proposed design requirements and targets.According to the requirements,we chose a structure of 4th order single bit CIFF.The feed-forward path of the CIFF results in the reduction of the signal amplitude through the integrator and the design requirements of integrator,which is conducive to the low power design.Single-bit quantization structure with intrinsic linearity has a wide application in the audio modulator.This paper compared the advantages and disadvantages of the discrete-time and continuous-time integrator.Considering the matching of process,we selected discrete-time integrator in this design.According to the design requirements,we modeled it in MATLAB Simulink by SDToolbox and simulated the non-ideal characteristics,and then proposed the design requirements of every sub-model.The system level model was realized by the actual mapping of transistor circuit.In the circuit level,we used the current-starved transconductance amplifier to improve the current efficiency of the integrator.Moreover a reference voltage generator with low output impedance was used,which can achieve rapid transient speed in few static current.Next we used zuto zero technique to reduce the offset and decrease the transient requirements of first-stage integrator and the power consumption of modulator.The latch comparator with preamplifier can obtain quick settling time.The pre-simulation,layout design and post-simulation of the actual circuit blocks were carried out.This design used SMIC 0.18um mixed-signal process.The active chip core area was 0.424mm2.We built a reasonable test systems for this chip.The audio precision SYS 2722 was used to produce low-noise sine wave signal.The DAQ Board captured the output bitstream of the chip,and then used the matlab code to make analysis of the signal to noise ratio of bitstream.According to the requirements of interface and power supply,we designed a schematic of the test PCB.Single point connection was used in digital and analog ground in this test PCB and the differential input signal paths were fully symmetrical alignment.The DAQ Board used an external clock sampling mode,which is synchronized with the sampling clock of the chip.In Labview,we used DAQ assistant to program,which achieved real-time acquisition of digital stream and then the data were analyzed by matlab code.So the test system of chip is completed.In this design,the signal band of the audio sigma delta modulator is in the range of 20?20KHz,the oversampling frequency is 2.4MHz and the supply voltage is 1.6V.The frequency of the input sine signal is 5KHz in the testing system.The results show that the output peak SNDR is 81.1dB,the total consumption of the modulator is only 111uW and the quality factor FOM is 0.299pJ/step.So this design basically meet the low-power audio equipment application.
Keywords/Search Tags:audio, sigma delta, modulator, current starved OTA, auto zero
PDF Full Text Request
Related items