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Research On 1MB MRAM's Architecture And Key Circuits

Posted on:2019-07-01Degree:MasterType:Thesis
Country:ChinaCandidate:Y F LuoFull Text:PDF
GTID:2428330572957768Subject:Engineering
Abstract/Summary:PDF Full Text Request
Memory is an essential part of the circuit.In recent years,traditional memory circuits composed of CMOS has encountered physical limits.MRAM,which Based on voltage-controlled magnetic anisotropic magnetic channel junction,is a promising new memory which has smaller area,faster speed and lower power consumption.As a new type of device,there must be a suitable peripheral circuit to match the normal reading and writing operation.This paper focuses on the structure and peripheral circuits of VCMA-MTJ MRAM.Firstly,comparing the characteristics of several kinds of new memory and MRAM.Expounding the advantages and disadvantages of two kinds of MRAMs.The principle of VCMA-MTJ memory device used in this paper is introduced,And based on the physical characteristics of VCMA-MTJ,the three-terminal 1T1MTJ memory cell is designed.Building a 1Mb MRAM circuit on the basis of the cell.The functions of each input and output port in the peripheral circuit are introduced.The timing of the reading process and writing process are simply analyzed.Secondly,the read-write circuit is designed and optimized in this paper.According to the storage characteristics of VCMA-MTJ,a write process with pre-reading is designed to reduce the miswriting of data.Using logic to optimize the address decoding circuit,increases the driving ability of the circuit and improves the driving ability of the circuit.In the reading process,a bit line reset circuit controlled by external programming is designed,which is used to reduce the miswriting and increase the working frequency in reading process.At the same time,sensitive amplifier,the key module of the circuit is optimized.The double tail sensitive amplifier is used in the circuit.Finally,the redundant circuit applied to the test is designed for this new memory device.These redundant circuits can be divided into two types,one is the control of pulse width on the word line,including linear control and programming control.The other is to read and write the cell through the combinations of different BL and SL.Through these two redundant circuits,the performance of the whole circuit can be tested and regulated,and can be better understood and further studied and improved.
Keywords/Search Tags:MRAM, VCMA-MTJ, Pre-reading, double tail sensitive amplifie
PDF Full Text Request
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