Design Of The Light Control MTJ And The Reliability Study Of MRAM

The magnetic random access memory(MRAM)based on the spin transfer torque effect(STT)has the advantage of fast read and write speeds,low power consumption,high integration and radiation resistance etc.As an emerging non-volatile memory,STT-MRAM is expected to become a "universal memory" after continuous improvement.As the size of STT-MRAM becomes smaller and the density of storage arrays becomes higher,there are some problems with read-write error and reliability.This thesis focuses on the above proplems of STT-MRAM,and the specific contents are as follows:1.Aiming at the problem that STT-MRAM is prone to erroneous flipping during writing,a magnetic tunnel junction(MTJ)that can be driven by light is designed.The free layer of the magnetic tunnel junction is made of photosensitive material,and the fast writing of information is realized by controlling the size of the laser energy density.Theoretical derivation results show that: writing information to the MTJ through the light control method can significantly reduce the interference between reading and writing.The three-temperature model and the inverse Faraday effect were used to simulate the magnetization state of the free layer,and the optimal laser conditions for information writing were explored.The simulation results show that the laser can be used to control the write time of the MTJ device at picosecond level.2.Aiming at the problem of excessively large write current density of STT-MRAM,a time breakdown dielectric breakdown model(TDDB)based on self-heating effect is established.The self-heating effect of the MTJ is simulated with COMSOL.The simulation results show that when the stress voltage is 0.5 V to 1.5 V,the temperature increase of MTJ about 200 ? in both parallel and anti-parallel states.The data analysis software is used to fit the relationship between the temperature rise and the applied stress voltage of the MTJ in different states.Secondly,the MTJ self-heating effect is used to modify the time-dependent dielectric breakdown model,and a new lifetime model under different states is derived.The new lifetime model has a good fit with existing experimental data.The new model is used to predict the lifetime of the MTJ,which is several orders of magnitude lower than that of the original model in the parallel state and anti-parallel state,indicating that the self-heating effect of MTJ can significantly reduce the lifetime.Finally,the STT-MRAM reliability writing circuit is designed to reduce the influence of the self-heating effect on the lifetime of this device by controlling the write current.3.Aiming at the read and write error rate of STT-MRAM,an error correction module has been added to the STT-MRAM storage array.The information transmission process in the channel is used to simulate the reading and writing of memory data,and the encoding and decoding processes in the information transmission process are discussed in detail.This thesis constructs a low density parity check(LDPC)matrix,LU decomposition algorithm is used to encode,LLR BP algorithm is used to decode.And the MATLAB is used to simulation error correction algorithm.The bit error rate(BER,Bit Error Rate)without error correction and LDPC error correction is compared and analyzed.The simulation results show that the bit error rate after LDPC error correction can be reduced by about five orders of magnitude.In addition,the error correction capabilities of the LDPC codes under different code lengths,code rates,and iteration times are compared.The results show that the longer the code length,the smaller the code rate,and the greater the number of iterations,the lower the error rate.Therefore,the error correction module can effectively improve the bit error rate in the STT-MRAM array.4.Aiming at the design of the light-controlled the reliability of MRAM,the light-assisted reliability writing circuit is proposed.The circuit provides the required laser source to assist the STT-MRAM write infoemation through the grating coupler.The simulation results show that the proposed circuit could reduce the STT-MRAM write error rate and improve reliability.