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The Realization Of Radar Clutter Simulator Based On DSP

Posted on:2019-12-20Degree:MasterType:Thesis
Country:ChinaCandidate:Y LiFull Text:PDF
GTID:2428330572952155Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
With the requirement from the simulation of radar system for larger data processing,faster operation speed,and real-time performance of signal processing,radar clutter simulation,as an important part of the simulation of radar system,expects more sophisticated clutter models and more advanced techniques,and is interested in multi-more digital signal processor DSP which has the powerful performance on computing floating-point and the capability of real-time processing.In this work,after introducing the common clutter amplitude statistical model and power spectrum model,the Rayleigh clutter,Log-normal clutter,Weibull clutter and K clutter are generated by using the classic method that is called zero memory nonlinear transform.And the clutter data generated were tested by classical spectrum estimation method and goodness-of-fit test.According to the processing performance and memory resources of the multi-core TMS320C6678(referred to as C6678),the Rayleigh and the Log-normal clutter simulation are implemented in C6678.The main contents is as follows:Taking the advantages of code portability,floating-point processing performance,and data transferring between multiple cores,rayleigh and log-normal clutter are generated.Through the code portability of C6678 to simplify the programming process,after the generation of clutter by the MATLAB,the code can run in C6678 is by appropriately modified.The C6678 has eight high-performance cores that execute tasks and transfer data in real time and in parallel.When generating large amounts of clutter data,the critical and partitionable tasks that generate data can be assigned to each kernel by using the C6678's memory resources.In the paper,the flow chart of the algorithm for implementing clutter simulation in C6678 is firstly presented,according to the algorithm's allocation of memory and the EDMA3 module to be used,and the multi-core communication module is introduced and designed detailedly.Finally,the data obtained from the simulation of C6678 is compared with the data obtained from MATLAB,which can verify the system's feasibility.
Keywords/Search Tags:Clutter simulation, Zero Memory Nonlinear Transformation, Multi-core DSP
PDF Full Text Request
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