Design And Implementation Of Multi-core Simulator Based On Trimaran Platform

In the computer field, the development of software lags behind the update of hardware, which is a long-standing problem. Especially, as for the multi-core simulator, the manufacturers always develop corresponding simulation platforms for their chips. However, these tools are not suitable for multi-core architecture and its compiler technology research, since they are expensive and unavailable for customization.This paper, whose research platform is Trimaran, a mainstream open source tool for compilation and architecture in embedded system, designs a multi-core simulator framework based on Trimaran and then reconstructs the back-end simulator which is enabled not only to simulate operations of program running on the homogenous multi-core architecture but also to collect the corresponding information, on the basis of in-depth analysis of original Trimaran code. It explains the implementation process of the simulator framework from four aspects, including adding a variety of instructions interacting with the local SPM and the remote SPM, the encapsulation of the single processor simulator, generation of instruction queues for every core and statistics information of those instructions running on each core. Finally, some experiements have been done to test the four functions. The results of those experiments demonstrate that the back-end simulator of the Trimaran designed and implemented in this thesis can not only effectively support the simulation of homogeneous multi-core on the basis of assorted SPM operations, but also can accurately collect and analyze the information of programs running on the target system.