A Display Interface Controller's Low Power Design And Evaluation

With the continuous development of the integrated circuit design technology and the continuous updating of the manufacturing process,the complexity of the system is constantly improved.When the development of integrated circuit manufacturing process after deep sub-micron or nm node,a processor chip gate level logic unit there were even hundreds of millions of one or more,all of these promote the function of the chip is getting stronger and stronger,but on the other hand,with the power consumption will be bigger and bigger.The increase in power consumption can also lead to a series of problems,such as reduced reliability of the chip,improved packaging and cooling costs,and increased cost of chip testing and verification analysis.In today's integrated circuit design field,power consumption has become a factor that must be taken seriously after area and performance.Therefore,the research on low power consumption design for integrated circuits is of great value and significance.This paper firstly introduces the research background and significance of low power consumption design,as well as the research status of low power consumption design.Next,by analyzing the power consumption of CMOS integrated circuit,the basic approach of low power consumption design of digital integrated circuit is summarized.Then,the low power design of digital circuit design is explained in detail,which lays a solid foundation for the main work of the thesis.Main work of this paper is aimed at AMD Ryzen processor DP/HDMI interface controller module,this paper puts forward a complete set of high quality clock gating RTL low power design of low power design.First from the RTL design phase of function module circuit,then use Powerartist tools for RTL design has completed the function module circuit analysis of power consumption,power consumption and the clock gating quality report and optimization proposals,based on the optimization of recommended Prism,ODC,LNR and LER four kinds of optimization method to complete the RTL design optimization,improve the quality of clock gating,finally use Powerartist tools to analyze power consumption of the module again,check the power consumption optimization results.The data show that the low power consumption design scheme based on high quality clock gating can greatly reduce the dynamic power consumption of the functional module circuit and the whole chip.