MOSFET Device Model Extraction And Optimization Based On Bsim4

A semiconductor device is a basic component of an integrated circuit.The basic performance of the device determines the upper limit of the function that can be achieved by the designed integrated circuit chip.The model established for device input and output performance is an essential part of integrated circuit design and development.On the one hand,IC design developers need to develop and design integrated circuits with device models that accurately match the input and output performance of actual devices.On the other hand,wafer manufacturers need to use device models to analyze the input and output performance of devices.To verify that the device being produced meets the standards required for design development.Obviously,the device model communicates two areas of semiconductor device fabrication and integrated circuit design.So how to get a model that can accurately fit the performance of the device becomes a problem that must be solved.In order to solve this problem,as early as the 1980s,the University of California,Berkeley successfully developed the Bsim series of MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor)device simulation model,and the Bsim3v3 version of the industry was seemed as a standard.The Bsim series model is a SPICE model(Simulation Program with Integrated Circuit Emphasis).Since the SPICE model code is open source and allows users to fully access and migrate,it can be integrated into a variety of integrated circuit design software for use.This paper is based on the Bsim4 model,one of the Bsim series models.The model parameters extraction and simulation verification of MOSFET devices are used to verify the applicability of the Bsim4 device model for common MOSFET devices.Compared with the Bsim3v3 model,the Bsim4 model absorbs the problems found in the third-generation Bsim model in order to cope with the challenges of the advanced process,focusing on the physical characteristics of the device during operation,and considering the device size and process.Impact.The fitting parameters are also cited in the specific use to improve the accuracy of the model.And added a new input resistance model on the original architecture,using a better RF substrate impedance network,adding new channel thennal noise,providing more accurate gate tunneling current and adding GIDL/GOSL(Gate induced drain/source leakage)model.After entering the 21st century,the integrated circuit industry has developed rapidly,and the manufacturing process of semiconductor devices has also developed rapidly.The size of semiconductor devices continues to shrink,the integration of-integrated circuit chips continues to increase,and the current mainstream chip manufacturing process has reached 14-32 nm(Intel's fifth-generation i7 processor and Samsung Exynos 7420 processor all use the latest 14nm manufacturing process)The more advanced process is close to 7 nanometers.As the feature size continues to decrease,the thickness of the epitaxial layer decreases,and the voltage applied to the gate decreases.As a result,the threshold voltage and critical current of the device also decrease,resulting in complete shutdown of the semiconductor device.The voltage also becomes lower.In this case,even a small voltage may cause a weak inversion current,and the power loss caused by such a subthreshold current also increases.The decreasing thickness of the gate oxide layer also causes the operating state of the device to be in the quantum mechanical effect range,and some electrons can pass through the potential barrier formed by the oxide layer to generate a leakage current(tunneling effect).This is also the effect that the model of a small-sized device must be quantified.At the same time,higher device integration increases the parasitic capacitance generated between the connecting wires,and the presence of parasitic capacitance significantly affects the voltage-current conversion process of the device.In order to accurately simulate the multiple physical effects of MOSFET devices in advanced processes,such as longitudinal and lateral non-uniform doping effects,short channel effects and narrow channel effects,and drain induced potential due to device size reduction The threshold voltage model and the drain current model are established in the Bsim4 model.In order to characterize the carrier flow conditions on the surface and inside of the device,a mobility model is established.The gate tunneling current increases due to the reduction of the thickness of the gate insulating layer.The gate tunneling current model is established.The substrate current model is established due to the collision ionization current and the gate-induced drain leakage current in the substrate.At the same time,in order to consider the effect of capacitance on the device performance,a parasitic capacitance model is established.However,the model only provides a network that connects the input and output relationships.On each network node,the parameters describing the association between input and output need to be further extracted.In order to establish a direct connection between the model and device performance,parameter extraction is required based on the measured data of the device.The extraction process of the parameters is associated with the architecture of the model,ie the measurement of the specific bias state is used to extract the relevant parameters of the specific physical effect.This makes it possible to extract parameters that characterize the physical characteristics of the device more efficiently,making the model more reasonable.The parameter extraction process is divided into several steps:First,some process parameters,such as gate equivalent oxide thickness,polysilicon gate doping concentration,etc.,are extracted.Since the process parameters are involved in the entire extraction process,so generally its extraction is at the beginning of whole process;then,the linear region of the entire voltage-current model is fitted,and relevant parameters such as the threshold voltage of the long channel device,the gate induced drain leakage current,the gate tunneling current,etc.are extracted.Effective channel length and width parameters;next,the saturation region is fitted,channel length modulation effect,leakage induced barrier reduction effect,bulk effect caused by matrix current,drain induced threshold voltage offset and other effects The parameters are processed here;finally,some parameters related to impact ionization under high pressure operation are extracted.After the parameter extraction of all the processes is completed,we use the extracted model to simulate and fit the existing test data to verify the reliability of the extracted model and perform some analysis.The device simulation model obtained by extracting the parameters of the real measurement data of the device provides a real and reliable electronic component model for the integrated circuit designer,which can be used for the design and development of the integrated circuit chip;on the other hand,it can be a semiconductor provides the input and output simulation features of the device for analysis of device performance to the device manufacturer.At the same time,the physical parameters of the model are of great significance for the design,manufacture and improvement of the device and process development.