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Design And Implementation Of 100 Gigabit Ethernet Traffic Generator

Posted on:2017-07-04Degree:MasterType:Thesis
Country:ChinaCandidate:C H LiFull Text:PDF
GTID:2428330569998511Subject:Instrument Science and Technology
Abstract/Summary:PDF Full Text Request
The first protocol on 40 G and 100 G Ethernet was released in 2010,now 100 G Ethernet has entered a stage of rapid developmemt and application.As with any new technology,the relevant testing plays an important role to success.Test signal generation is a prerequisite to be able to execute a test,So this paper starts from the characteristics of 100 G Ethernet signal,then the design and implementation technology of 100 G Ethernet signal generator or 100 G traffic generator are studied.Specific work includes the following:Firstly,the development of Etherrnet technology and the technology system of Ethernet are studied,emphasis is on the analysis of 100 G in the 802.3ba Ethernet specification,and the function and architecture of 100 G Ethernet data link sublayer and PCS(Physical Coding Sublayer)sublayer,laying a solid theoretical foundation for the folloeing design work.Secondly,in oreder to meet the requirement of 100 G high speed date rate transmission and data processing,new design method is proposed for some key modules,such as the inter frame gap adjustment for the alignment marker insertion,the parallel scrambler / descrambler,the 100 G Ethernet CRC check caculation,the 66 B block synchronization and lock,the PCS multi lane alignment.Thirdly,a design scheme of 100 G Ethernet signal source is proposed.The system function design and hardware platform design based on FPGA(Field Programmable Gate Array)are described respectively later.The host computer software and FPGA hardware module are designed.The function of the platform is tested and verified,the result proved that the design function works well and can meet the requirement expected.
Keywords/Search Tags:100GE, test, signal source, traffic generator, multi-lane, FPGA
PDF Full Text Request
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