Research And Design Of Two-dimensional FFT Based On FPGA

Image processing can be divided into the time domain processing and frequency domain processing in accordance with the scope.The time domain processing is used widely in most practical applications,but the frequency domain processing has a great advantages in some special handling,such as image fusion,enhancement.FFT is commonly used in digital signal processing.FFT needs to be extended to two-dimensional FFT when the image is converted from the time domain to the frequency domain.2D FFT(two-dimensional FFT)is important in synthetic aperture imaging radar(SAR),digital watermarking and other aspects of medical imaging.With the increase of the amount of information processing,the speed of system processing is required faster and faster,and the system performance requirements is increasingly stringent.At present most of the implementation of the 2D FFT algorithm use DSP and ASIC,but there are some deficiencies.With the development of semiconductor technology,FPGA has become a hot research for its good portability,high speed and parallel operating characteristics.According to research trends,this paper researches the hardware implementation of 2D FFT algorithm and designs a 2D FFT processor whose points are 256*256 based on FPGA.According to the analysis the radix-4 FFT is adopted to realize 2D FFT algorithm,the data format is expressed by fixed-point and the hardware structure of the is pipeline in order to make data throughput speed faster.The system is divided into module divisions using top-down design method.2D FFT decomposes into two directions that are row direction and column direction.The focuses are the designs of the one-dimensional FFT and the transpose buffer module.Modules are implemented by using verilog and the complex multiplication and butterfly calculation unit are improved.The rotation factor module is also used the storage-saving resources programs.The realization of the hardware structure and the transpose matrix have been extended.Different hardware resources can use different structures.When the number of points is larger,the effect of efficient transposition storage algorithm is prominent.This paper also analyzes the optimize direction for the real number of 2D FFT algorithm.The critical design and comprehensive implementation are accomplished by the Altera's FPGA development tool Quartus ? and third-party simulation tool Modelsim.Finally,the program is downloaded to the development board to verify the data processing results.The results are compared with the data processed directly by Matlab.Eventually good results is achieved.Based on radix-4 FFT algorithm,the consumption of resources has increased,but the speed is improved.It has a very good application prospect in the future because of the rapid growth of chip resources.