Study On The Packaging And Testing Of Multi Pin Phase Change Storage Array

Phase change memory has small size,low power consumption,fast work,excellent fatigue resistance,anti-interference ability and so on.As phase-change memory storage density continues to increase,the number of pins in phase-change memory chips is increasing,and pins become more and more dense.The structure and method of the chip package will determine the stability of the use of the chip and the quality of the connection with other circuits,affecting the performance of the chip.However,high-density multi-pin array package testing is still not mature.For highdensity multi-pin array package,there are problems such as package warping,rework problems and so on in the mainstream SMD package technology and BGA package technology.Encapsulation testing of memory arrays helps to efficiently perform reliability analysis of basic memory cells and is crucial for memory development.Therefore,there is an urgent need for a method that can package high-density multi-pin chips.This article focuses on the packaging and testing of multi-pin phase-change memory arrays.A novel packaging method is designed for multi-pin high-density chips.The high-density multi-pin chip package is completed,and the testing of 32 Mbits phase change memory arrays is completed by using semiconductor analysis testers and probe stations.The packaging method effectively solves the problem of warpage in the package,and will not causing welding faults,reducing the sensitivity to temperature,and the packaging chip can be detached and replaced.32 Mbits phase change memory array package is based on the completion of device performance testing,read and write operations.This article builds a test system for multi-pin phase-change memory arrays and complete the test for a 32 Mbits phase-change memory array.The phase change memory array used in this paper adopts 1T1 R structure.The storage medium material is Ge2Sb2Te5.The basic idea of the package test is to phase change the storage array is divided into rows and columns,and then build a peripheral decoding circuit to complete the row and column selection.It selects the array of specific phase change memory cells,and then applies the measurement signal phase change memory cells make measurements.Through the gating switch to control the choice of ranks,and then measure the entire phase change memory array.According to 32 Mbits phase change memory array design test board,and optimize the decoding circuit and the array to be tested to connect the wiring.Finally,aiming at the design of high-density multi-pin phase change memory array package design,the thermal crosstalk test system and the hold time test system are designed.The basic performances of 32 Mbits phase change memory array are tested.The phase change memory cell life test,Crosstalk test are also designed.