| With the extensive application of the mobile products,the demand of high-speed storage in the market increases constantly.FLASH which develops quickly can meet the ever-increasing market.Because the NAND FLASH is different from the traditional memory,the researchers will face many challenges designing NAND FLASH module.However,the way to achieve the simple storage system is to add a controller in the FLASH.With the more and more visit memory space of the system,it is necessary to judge and correct the errors which may appear.Aimed at this condition,the error correction code of the system application achieves the function of error inspection and correction.FLASH can be achieved by the method of IP insertion in the design of DSP.The main contents are as follows:(1)Due to the function upgrade,the embedded FLASH IP needs to add the function of error inspection and correction.In this paper the function of ECC module is divided.The detailed process of error correction algorithm is refined in the process of error inspection and correction.(2)Because the silicone chip manufacturer changes,the process changes as well.In this paper the interface logic is designed again by verifying the detailed functions of FLASH,which makes the pin can be reused and makes the logic consistent.As for the clock,FLASH IP needs to add the timer to finish the removing operation.(3)The storage space needs to magnify twice.In this paper two pieces of new structures of IP core are designed,and the input and output interfaces of the data and the address interface are designed again.In the aspect of the storage speed,in this paper the new data structure fragmentation is designed,which makes the storage speed promoted twice.(4)In the emulation proof stage of the project,in this paper the function verification of FLASH is finished,such as power on reset,reset,removal,programme and operation reading.So far,the double-core structure in this paper finishes the front-end design,the function verification reaches the design requirements. |