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Researsh And Implementation Of High-efficiency Computeing Unit Appled To Neural Networks

Posted on:2019-10-26Degree:MasterType:Thesis
Country:ChinaCandidate:C QiFull Text:PDF
GTID:2428330548980118Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Among the many artificial intelligence technologies,neural network is the most successful and widely used technology today.Convolution neural network is a further development of neural network.with the emergence of convolution neural network,the development of artificial intelligence is also flourishing.However,with the increasingly complex design of convolution neural networks,increasing power consumption is also an important factor limiting its development.Among them,the power consumption of convolution calculation accounts for up to 90%.Multiplier is an important computing unit in convolution calculation,considering that the calculation in neural network does not need to be completely accurate,an approximate multiplier suitable for convolution neural network is designed in this thesis,in order to achieve the purpose of reducing power consumption.As there are many kind of approximate multipliers,the power and mean relative error(MSE)and other key performance are also different,sometimes even can have great difference.Firstly,based on the research results at home and abroad,this thesis determines the reference circuit suitable for convolution neural network,and optimizes this circuit in logic and circuit structure two levels.In the logic level,optimized circuit reduces the average relative error by 2%with only small power consumption cost by adding the high position partial product.In the circuit structure level,optimized circuit uses the operation of shifting to a fixed position,replacing the original module like LOD,and to facilitate the adding of the most effective product.Then,the Spice program of the optimized circuit and the original circuit is compiled in this thesis and the software Hspice is used for simulation.A figure of merit(FoM)considering power consumption,delay and MSE is also designed.The simulation results show that the optimized circuit is better than the original circuit under different input voltage,temperature and corner,with the FoM reduce lowest 8.26%to highest 16.3%.Finally,this thesis substitutes the optimized approximate multiplier circuit into the calculation module of open source neural network platform NVDLA,and through the simulation to determine its optimize effect in practical applications.
Keywords/Search Tags:Low power consumption, Neural network, Deep learning, Approximate multiplier
PDF Full Text Request
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