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Research On Modeling Of SOI LDMOS Block State Physics

Posted on:2019-01-24Degree:MasterType:Thesis
Country:ChinaCandidate:X L HaoFull Text:PDF
GTID:2428330548976181Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
With the development of SOI(Silicon On Insulator)technology,SOI lateral power devices have been developed by leaps and bounds and widely used.Among them,SOI LDMOS(Lateral Double-diffusion MOS)as a representative of SOI lateral power devices,with its excellent performance,low cost,high integration and good process compatibility,making it become a member of power integrated circuit core components.Aimed at many new SOI LDMOS device structures,domestic and foreign scholars have built related physical models of block states based on the related physical assumptions,and the research on the model has also evolved from simple one-dimensional to more precise two-dimensional.However,for the BPL SOI LDMOS device structure failed to establish a perfect physical model of blocking state.Firstly,the basic theory of SOI LDMOS,the technology of breakdown voltage and the development of breakdown-voltage model are introduced systematically in this paper.On the basis of this,a surface electric field and potential distribution model of SOI LDMOS with arbitrary variable doping in lateral drift region is established.Based on this model,electric field and potential distribution model of SOI LDMOS with uniform doping and step doping in lateral drift region is established,and by comparing the surface potential distribution obtained by the TCAD simulation software and the model analysis results,the two are in good agreement,verify The model is correct.Secondly,electric field and potential models and breakdown voltage model of the BPL(Buried P-type Layer)SOI LDMOS device is established.In this process,the BPL SOI LDMOS model criterion is first established.According to the model criterion,the BPL SOI LDMOS is equivalent to the quasi-bulk silicon structure and the equivalent drift region structure,and respectively established the electric fields and potential models and breakdown voltage model,and verify the correctness of this model.Thirdly,the field plates BPL SOI LDMOS model is established.In this process,two equivalent structures of BPL SOI LDMOS are partitioned according to depletion boundaries under different depletion conditions,in the end,a uniform model of the surface electric field and potential model with gate and drain and gate and drain field plates structure is established,and verify the correctness of this model.In addition,the influence of the structure of the field plates on the surface electric field and potential is also discussed.Finally,based on the idea of equivalent drift region and drift region,the surface electric field and potential models of BNL(Buried N-type Layer)SOI LDMOS,P-top SOI LDMOS and NP double top SOI LDMOS devices are established respectively,and verify the correctness of thismodel.In addition,we compared the surface electric field and potential distribution of SOI LDMOS with P-top layer and NP double top layer with conventional SOI LDMOS to get the effect of P-top layer and NP top-double structure on the surface electric field and potential.
Keywords/Search Tags:SOI LDMOS, BPL SOI LDMOS, Electric Field and Potential Model, Breakdown Voltage Model, Field Plates
PDF Full Text Request
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