Research On The Multi-Vth Configuration Technique For Synergic Mitigation Circuit Aging And Leakage Power

As the technology level of the integrated circuit enters the nanometer level,aging effect caused by Negative bias temperature instability(NBTI)has become one of important factors that affect the reliability and life of the circuits.The NBTI effect will increase the aging delay of PMOS devices,and ultimately affect the normal logic output of the circuit.Therefore,the research of anti-NBTI technology has become the important topic of IC reliability design.Moreover,the sharp increase of sub-threshold leakage current makes leakage power increase,which reduces the service life of the circuit.Because the impact of threshold voltage on the NBTI effect differs from the impact on the leakage power consumption,it is particularly important to alleviate the NBTI effect and reduce the leakage power consumption.The traditional multi-threshold voltage methods only consider one critical path of the circuit but other paths in the circuit that may exceed the prescribed timing constraints are ignored which reduce the anti-aging effect of the circuit.A Multi-Vth method considering power constraints for mitigating circuit aging is proposed in this thesis.According to the preset timing margin,the potential critical paths can be found and redefine the formula for calculating the weights of the critical gates.Then the gates with the standard threshold voltage type in these paths can be replaced with the low threshold voltage type and finally get the threshold voltage type of all logic gates in the circuit.Experimental results based on ISCAS85 benchmark circuits show that the after-aging delay improvement is up to 12.97% within the power constraints,which is better than the traditional multi-threshold voltage schemes.In addition,the anti-aging effect will be better if the size of the circuit is lager.In this thesis,the multi-threshold voltage method with power constraints is considered to alleviate the NBTI effect,which brings certain power consumption to the circuit meanwhile.Therefore,this thesis presents a scheme to alleviate the NBTI effect while reducing power consumption: Based on the traditional multi-threshold voltage scheme,we find the set of non-critical gates in the circuit and define the formula for calculating the weights of non-critical gates.Then the non-critical gates are replaced by the high threshold voltage type.Compared with the multi-threshold voltage scheme that consider power constraints,the proposed scheme reduces the power consumption of leakage by an average of 28.50% on the premise of keeping the anti-aging performance of the circuit unchanged,which effectively reduces the leakage power of the circuit and improves the reliability of the circuit.