Research On NBTI Aging Mitigation Technology Of Integrated Circuit Based On Dual Constraint M-IVC

Negative Bias Temperature Instability (NBTI)-induced PMOS transistor aging has become a prominent reliability concern in the nano-scaled IC design. IVC method was adopt to Mitigate the NBTI effect during standby mode, applying input vector to protected circuit. With the improvement IVC method, its anti-aging effect is also getting better and better. In this paper, we will to explore the deficiencies of the existing M-IVC method, and propose a double-constrained M-IVC method.Existing M-IVC method can mitigate the NBTI effects of the circuit, which applying multiple input vector to the combination circuit in a non-uniform way. However, this method only considered the input signal duty cycle constraint while ignored the input signal waveform. This paper proposes an improved M-IVC method. First, the optimization duty cycle can be worked out by genetic algorithm. Second, a set of randomly generated vectors is applied in each clock cycle, which considering the constraint of the input signal duty cycle. The experimental results on ISCAS85 benchmark circuits and 45nm transistor model show that, compared with the existing M-IVC method, the circuit time delay degradation can be improved by 51.5% on average when S/A is 5/5, and the effectiveness gets better as S/A increases.Considering that the input vector in the proposed scheme needs to be updated periodically, it is necessary to design a vector generator that satisfies the constraints. In this paper, the LFSR device is used to implement the pseudo-randomness constraint of the vector, and the constraint of the input duty cycle is controlled by the counter.Experimental results show that, compared with the existing M-IVC method, additional area overhead increased by an average of 27%. For large circuits (eg C6288), the additional area overhead is only increased by 12%. It is also possible to reduce the area overhead by classifying the guard pins of the protection circuit in the existing M-IVC method and the double-constrained M-IVC method (in this paper). Experimental results show that, the method of guarding the pin classification control is to reduce the average area overhead of the vector application control circuit by 38%.