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The Research Of Zone-based Flash Translation Layer For Nand Flash-based Storage Systems

Posted on:2014-01-01Degree:MasterType:Thesis
Country:ChinaCandidate:W B CaoFull Text:PDF
GTID:2248330398486521Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
In recent years, flash memory has been widely used in many embedded systemsdue to its high speed, non-volatility, low power consumption, shock resistance, highreliability and small size, paving the way for Enterprise Storage System. Because ofthe differences between magnetic disk and flash memory, traditional techniques forstorage management, which are used in magnetic disks, can not be applied directly toNand flash memory devices. Thus, it is of practical and theoretical significance todevelop a suitable and effective technique for storage management for Nand flashmemory devices.This dissertation first of all showed the existing schemes of storage managementfor Nand flash memory, and pointed out the key elements of storage management,then exploratory study was made in terms of address allocation, garbage collectionand buffer replacement algorithm, and the corresponding solutions were provided. Insum, study makes the following contributions:1. A Zone-based Flash Translation Layer (ZFTL) for NAND flash-basedstorage systems is proposed. ZFTL is a novel pure page-level flash translation layerthat divides a whole NAND flash memory chip into several zones and caches only theaddress information of the demanded zone in the memory. Thus, ZFTL reduces theconsumption of SRAM and provides a high scalability for high-density NAND flashmemory.2. A two-tier selective caching mechanism based on access mode selectionalgorithm is proposed. In order to minimize the address translation overhead, wepropose a two-tier selective caching mechanism to jointly exploit the temporal localityand the spatial locality of workloads. By selectively the caching request mappingentry with the two-tier architecture, ZFTL utilizes the limited SRAM more efficientlynotably improving the hit ratio of the buffer zone and reducing the respond time ofsystem.3. A flash translation layer algorithm simulation platform is proposed. In order to study the performance of ZFTL, this paper extends a famous trace-drivenflash simulator--FlashSim, and realizes ZFTL on it. In addition to ZFTL, this studyimplements another three kinds of classic FTL algorithms: page-level FTL, FAST andDFTL.In the evaluation, we choose several real-world access request as input source tostudy the performance impact of different FTL schemes on a wide spectrum ofenterprise-scale workloads. By comparing ZFTL with state-of-the-art FTL schemes indifferent traces, this paper obtains more insights into its system performance. It willgreatly improve the performance and reduce the cost of NAND Flash in practice.
Keywords/Search Tags:flash memory, flash translation layer, address allocation, garbagecollection, buffer replacement algorithm
PDF Full Text Request
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