Optimization Strategy Of SSD Cache Based On NAND Flash Memory

After a long period of development,the computer architecture has made great strides in all aspects.In terms of storage architecture,although the capacity of the storage system has been greatly improved,the problem of the difference in speed between different devices deepens,the storage subsystem has become one of the bottleneck of the development of the entire computer system.The invention of NAND flash memory alleviates the difference in speed between the memory and the underlying storage system effectively.However,due to the inherent defects of NAND flash memory,such as large read and write overhead,lack of support for "in-place update" operation and limited erase times,the performance,reliability,and service life of flashbased storage devices are seriously affected.In this paper,taking NAND flash memory SSD as the research object,the main research is memory buffer management algorithm and SSD FTL layer garbage collection algorithm based on NAND flash to reduce the underlying NAND flash memory read,write,erase and other operations to shorten the response time of the storage system to the top request and extend its service life.This paper presents a buffer replacement algorithm for local perception,LLRU,by analyzing the classical flashbased buffer replacement algorithms of CF-LRU,LRU-WSR and AD-LRU.The algorithm divides the buffers into four categories: cold clean buffer,cold dirty buffer,hot clean buffer,hot dirty buffer.The algorithm also makes use of frequency of data accesses,which increases the utilization of buffers.Through the above improvement,when the buffer capacity is 4 MB,LLRU is 4.89% higher than the average hit rate of AD-LRU,which is 11.61% less than the average number of read physical pages of ADLRU,10.98% less than the average number of write physical page of AD-LRU and 4.95% less than the average number of erase physical block of AD-LRU,an average of 10.93% less than the running time of AD-LRU system.Based on the analysis of the classic hybrid mapping strategies such as BAST and FAST in the study of the SSD translation layer,we found that the hybrid mapping strategy has a high cost when implementing the garbage collection strategy.At the same time,we analyzed the garbage collection strategy Basic_GC of DFTL,and found that we can effectively reduce the number of reads and writes to the flash chip and the erasing times of physical block by classifying the request data into hot and cold types before the page-level mapping implements the strategy of garbage collection.Through the above classification,when the SRAM capacity is 32 KB and the test load is Fin1,compared with Basic_GC,the algorithm DAP reduces the ratio of reading and writing 16.25%,the number of block erasing 5.86% and the average response time 4.86%.