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Researh On Digital Predistoration Linearization Technology For Boarband RF Power Amplifier Based On FPGA

Posted on:2019-05-09Degree:MasterType:Thesis
Country:ChinaCandidate:X S ZhangFull Text:PDF
GTID:2428330548473453Subject:Circuits and Systems
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With the continuous development of wireless communication technology,people's demand for various communication methods is also continuously increasing.however,due to its low frequency utilization rate,traditional communication methods cannot meet various communication needs.In order to improve the spectrum utilization rate to meet people's needs,5G communication technology has been studied more and more as a brand-new communication method.Power amplifier is one of the most important components of 5G communication system.its main function is to amplify the modulated signal so that it can reach the transmitting power matched with the transmitting antenna and ensure that the receiving equipment of the system can obtain stronger signal power.It will produce a greater degree of nonlinear distortion to the entire communication system and affect the quality of the communication system.Therefore,it is very important to study a new compensation technique to linearize the RF power amplifier.There are many power amplifier linearization techniques,but the digital predistortion technique has the advantages of simple implementation,low cost and good effect on power amplifiers with strong nonlinearity and has gradually become the mainstream power amplifier linearization solution.This paper mainly studies the digital predistortion technology of broadband RF power amplifier.The main research work includes the following two aspects:Firstly,the basic principles of the memoryless polynomial predistortion model and the Volterra series band-limited digital predistortion model are studied.the indirect learning structure is chosen as the learning structure of the predistortion system.the performance of the memoryless polynomial predistortion model and the Volterra series band-limited digital predistortion model are simulated by MATLAB.The ACPR(Adjacent Channel Power Ratio)values can reach-39 d Bc,-38.55 d Bc and-68.81 d Bc,59.34 d Bc respectively.Secondly,the FPGA(Field Programmable Logic Gate Array)hardware development platform of Xilinx xc7k325 t chip is used to implement the memoryless polynomial model.the modules implemented by FPGA mainly include ADC(Analog-To-Digital Conversion)module,(Digital Up-Conversion)DUC module,filter module,DPD module,(Digital Down-Conversion)DDC module,DAC(DigitalTo-Analog Conversion)module,among which DDC,DUC module,filter module,multiplication and addition in each module are implemented by IP core.Finally,a hardware testing platform is built to test the predistortion performance,and the measured results and simulation results are analyzed and compared.Through the memoryless polynomial predistortion model implemented by FPGA,the values of ACPR can reach-39.0d Bc,-38.23 d Bc.compared with the theoretical simulation of MATLAB,the ACPR values lost about 1.9d B and 1.6d B.this is because there are many processes such as bit width intercept in the FPGA design process,which has a certain influence on the final predistortion output.in addition,the signal value output by FPGA system is of integer type,and when the bit width of the output signal is small,there is a large error.Aiming at the defects and shortcomings of the above two traditional digital predistortion technologies,a band-limited digital predistortion model is studied.the model describes the characteristics of power amplifiers by combining the second-order DDR model with MP model(2-oder DDR and MP model,2-DDR&MP).Matlab is used to simulate the performance of the newly proposed 2-DDR&MP band-limited digital predistortion model.the ACPR values can reach-65.2d Bc,-64.34 d Bc,which is 26.2d B,25.79 d B,3.39 d B and 5d B higher than the traditional memoryless polynomial predistortion model and Volterra series band-limited digital predistortion model respectively.Then,the FPGA hardware development platform of Xilinx XC7K325 T chip is used to implement the new model and build a hardware test platform to test the predistortion performance.after analyzing and comparing the measured results with the simulation results,the ACPR values can reach-58.82 d Bc,-57.74 d Bc,which is 21.82 d B and 21.51 d B higher than the traditional memoryless polynomial predistortion model.the test results show that the design achieves the expected goal.
Keywords/Search Tags:Power amplifier, Digital predistortion(DPD), Volterra, 2-DDR&MP, FPGA
PDF Full Text Request
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