Research And Implemention Of Digital Predistortion For Wideband Power Amplifier Based On FPGA

Recent years,with the striding development of semiconductor and wireless communication technology,human beings have been heading towards the information highway.People's massive and complicated requirements promote the mobile communication system to be improved step by step.In order to obtain higher data transmission rate and spectrum efficiency,new communication systems have to increase transmission bandwidth and to adopt the modulation with inconstant envelop such as QPSK,64 QAM,and OFDM etc.When these modulated signals pass through the radio frequency power amplifier,the power amplifier will work at back-off domain,so its efficiency should be reduced.Other more,the power amplifier will generate more serious nonlinear distortions because of the increased bandwidth.In order to solve these problem,an efficient way is to linearize the power amplifier.On the basis of the research and analysis about many kinds of linearization technologies,a digital predistortion technique based on FPGA is proposed in this thesis,which is easy,cost-effective and flexible.The main works and innovations of this paper are listed follows:1.This thesis analyzes the model of a wideband power amplifier.According to the comparison of current existing models from basic functions,complexity of calculations and model accuracy,the limitations of those models for implemention on FPGA are pointed out.Meanwhile,a novel model called MCMP model is proposed.The new model has a good balance of computation complexity and model accuracy,it is easy to realize.When the model is used for a power amplifier under a 20 MHz LTE signal stimulation in MATLAB,it has been found that the normalized means square error is decreased by 3 dB compared to the MP model and the complexity is 20 percent less than a DDR model.2.This thesis studies the problem of uniform quantization in the LUT predistortion,and it adopts a LUT with segment ununiform quantization with interpolations.To improve the accuracy of computing the complex gain,the depth needs to be risen when traditional LUT is used at the cost of time and memory area expanded.As for the low probability distributed signal or the power amplifier with good linear performance,the piece-wised uniformed LUT uses less terms to save the results with interpolation.On the contrary,the terms will be increased where the signal distributes with high probability or the power amplifier with poor linear performance.The resource consumption of this architecture is 30 percent less than a traditional one,and our figure of merit is 2.5 dB higher3.This thesis accomplishes an on-chip digital predistortion scheme and builds a test platform based on Xilinx VC707 board.The modelization of power amplifier and predistortion coefficients computation are completed in a Microblaze soft core.The results are sent to the predistortion module based on the LUT to process and obtain the predistortion baseband signal.Comparing to the architecture of FPGA+DSP and FPGA+ARM,the on-chip plan has the advantages of easy implemention,cost-effective and lower power dissipation.Both 20 MHz and 40 MHz LTE signals are tested using this platform,the ACPR can be reduced below 45 dBc.