Research Of Digital Predistortion For RF Power Amplifiers And Its FPGA Implementation

With the developing of wireless communication and the increasing social needs, higher transmission quality and larger capacity of communication system is needed. The modulation of non-constant envelope is popular in the processing of striving for higher data rate and better spectrum efficiency,which is sensitive to the non-linearity of power amplifier.Moreover,efficient power amplifier is required in modern communication system while the linearity of power amplifier is limited.These make the technology of power amplifier linearization to be one of key points in wireless communication.In the paper,the power amplifier linearization is researched.Firstly,the non-linear characteristic and memory effects of power amplifier and common linear technologies are showed.The principle of adaptive digital predistortion is introduced Secondly,the memoryless and memory models of power amplifier and two practical methods of predistortion which are look-up table based method and polynomial based method are introduced.This paper focuses on the memory polynomial predistortion based on QRD_RLS adaptive algorithm.The simulation and analysis of this algorithm based on Matlab are given which lay the foundation for the implementation on FPGA. Finally,the implementation architecture of digital predistortion is introduced.The principle of CORDIC technology,complex Givens rotations and Systolic array which are related to QRD_RLS adaptive algorithm are introduced.After that,the implementation of QRD_RLS adaptive algorithm based on CORDIC technology with Systolic array is illustrated in detail and the digital predistortion is implemented on FPGA.With the guidance of software defined radio(SDR),the digital predistortion with the memory polynomial based on QRD_RLS algorithm is implemented on FPGA through System Generator and the test result on hardware shows that the digital predistortion works well.