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Research On The Logic Algorithm Of Pixel Configuration For High Definition Naked-eye 3D TV

Posted on:2019-09-13Degree:MasterType:Thesis
Country:ChinaCandidate:J Y YangFull Text:PDF
GTID:2428330548463171Subject:Mechanical engineering
Abstract/Summary:PDF Full Text Request
The optical principle of naked-eye 3D technology has been gradually improved.This technology has an important application in the field of photoelectric display.It can develop practical products in the fields of TV,display,mobile display and advertisement display.It has great economic value.This paper aims at the development of naked-eye 3D TV,and completes the sub-screen pixel configuration of the left and right half wide stereoscopic images transmitted by the cable TV network through digital logic design.The high-definition video signal is output to the naked-eye 3D TV interface through the HDMI interface,and the serial data stream includes the left and right format half width 3D video and the accompanying sound signal.The pixel resolution and size specification of the naked-eye 3D LCD are gradually improved,and the video image data is input using the LVDS serial interface between the screen and the external interface,so the configuration of the sub-screen pixels needs a fast video processing method.In this paper,the pixel configuration logic method of the naked-eye 3D TV set can be transmitted to the corresponding sub-screen by the interpolation of the left and right half wide stereoscopic images of the pixels through a variety of types of digital interfaces.The main research work completed in this paper is summarized as follows:1.After combining the optical principle of raster-based naked-eye 3D display and the characteristics of the three-dimensional image,FPGA is selected as the processor of the hardware system.Firstly,on the naked-eye 3D LCD screen with TTL interface,red-blue 3D image pixel column interpolation processing is performed,which provides basic conditions for naked-eye 3D display.2.The circuit that uses the external interface HDMI as the sender is designed.The HDMI transmission principle is based on the TMDS technology,FPGA adopts the SOPC scheme,uses ADV7513 as the HDMI sending end chip,performs the codec work of the related data,and transmits the 3D captions and images of the left and right format to the 3D TV.3.Complete the logic method research of LVDS serial video data encoding.Using the left and right format BMP images stored in SD card as the data source,the DDR2 SDRAM is used as the cache module and the LVDS interface is sent to the naked-eye 3D display.The corresponding relationship between the pixels of the image and the point to point of the physical pixels of the display screen can be accurately realized,and the transmission and fusion of the left and right 3D images through the LVDS interface can be realized.Through a variety of digital interface experiments,it is proved that the logical algorithm of pixel configuration is feasible.It can be used for the design of IC for naked-eye 3D TV drive circuit.To a certain extent,it can actively promote the industrialization process of naked-eye 3D TV.
Keywords/Search Tags:Naked-eye 3D image processing, pixel configuration, TTL, HDMI, LVDS
PDF Full Text Request
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