Research On Naked-eye Stereoscopic Video Signal Processing Technology

With the development of mobile Internet, the application of portable device hasbecome more and more widely. The portable naked-eye3D devices that combine thenaked-eye stereoscopic display technology with the mobile Internet technology havebroad market prospects and significant economic value. The portable devicesequipped with an embedded system has a powerful capability of data processing andthe function of mobile Internet,which can provide a new visual experience throughcombining with the naked-eye stereoscopic display technology. The portable naked-eye3D device is an important application of the naked-eye stereoscopic displaytechnology, this paper mainly studies hardware circuit structure and logic design ofthe3D video signal conversion of the portable naked-eye device,ARM+FPGA hardware structure is proposed under the premise of fullyanalyzing the characteristics of embedded system and the3D image formats. ARMdecodes and plays stereoscopic video and sends image data through the LCD screeninterface, FPGA is used as the core of signal processing system and for thecollecting,storing and converting of the video data from ARM. The converted dataformat matches with optical structure of the naked-eye3D LCD screen to realize3Ddisplay. ARM+FPGA hardware structure is more beneficial to design the circuit andmakes full use of advantages of them to complete the large data volume video filesplaying and processing,such as completing3D video signal processing of tabletcomputer and other products in small and medium size.Video signal conversion module uses FPGA internal logic resources to achievereal-time stereoscopic video signal ’s capture, store and processing. The embeddedRAM blocks within FPGA constitute large-capacity FIFO and dual buffer poolcomposed of two levels cache of video data, left and right format stereoscopic imageuse columns interpolation to complete format conversion in dual buffer.Parameterized LCD screen controller is designed for different specifications of theLCD screen, and the controller can drive a variety of LCD screen as long asmodifying the corresponding parameters of time sequence. In the process of system debugging, at first using stereo image to verify thecorrectness of the data processing module function, and then building the hardwarestructure of the portable naked-eye3D device, and using SDRAM as frame buffer ofARM systems image output. After careful analysis of the characteristics of the systemimage format and data transmission, using FPGA internal resources to store the videoimage data that will be sent to the LCD for display after processing. Systemarchitecture and logic design are suitable for processing the data of left and rightformat stereo image which can be applied to design the portable naked-eye3Ddevice.