CORDIC Based Architecture For Arbitrary Root Computing

In the domain of Very Large Scale Integration Circuit,various kinds of processing IPs play a vital role.When it comes to Application Specific Integrated Circuit(ASIC),the performance of the key processing unit directly reflects the performance of the overall circuit.This paper proposes a CORDIC-based hardware architecture to compute the arbitrary root of an integer.The proposed architecture takes the advantages of CORDIC algorithm,such as low computing complexity,high accuracy etc.In order to compute the arbitrary root of an integer,this paper divides R1/N into three subtasks:Hyperbolic arc tangent calculation,division and Hyperbolic sine cosine calculation.By making the CORDIC processing unit work under different modes,this paper can easily assemble them to complete the calculation of Nth root.During implementation,the proposed architecture adopts certain methods to expand the convergence range of CORDIC algorithm,and designs a fully pipelined structure to achieve a high throughput.This paper firstly verifies our proposed architecture in MATLAB,and further realize our design through Verilog HDL.In hardware implementation,this paper uses fixed point number to demonstrate our design,and the computing range of our design is as follows:R ?[9.4676e-07,1.0562e+06]?N ?[2,+?].The average relative error achieves approximately 10-5 magnitude.Finally,this paper synthesizes the proposed design under the TSMC-40nm CMOS technology.The highest frequency is up to 2.083GHZ with the area consumption of 197421.00 ?m2.And the area consumption decreases to 169689.98 ?m2 when constraining the frequency to 1 GHZ.