High-Speed And Real-Time Adaptive Anti-jamming Arrays Processing Technology

The paper presents the realization of adaptive least squares array signal ssing algorithm based on QR decomposition adopting annihilation-reorder -ahead technology. The annihilation-reorder look-ahead technology .isforms a sequential adaptive array signal processing algorithm into an 4uivalent concurrent adaptive array signal processing algorithm by creating additional concurrency in the algorithm. The annihilation-reorder look-ahead is employed to develop fine-grain pipelined QR decomposition-based RLS adaptive algorithm. The proposed architectures can be operated at arbitrarily high sample rate without degrading the convergence behavior and consist of only Givens rotations, which can be scheduled onto CORDIC arithmetic-based processors based on FPGA. In the end, the hardware plat for the adaptive anti-jamming array system is designed. Chapter 1 addresses the present conditions and development of the high-speed and real-time adaptive anti-jamming arrays technology. Chapter 2 deals with recursion least-squares algorithms based on QR department that is adopt to be implement intercurrent and describes the topology and processors than can be used to realize the system. Chapter 3 studies the annihilation-reorder look-ahead technology that is employed to develop fine-grain pipelined QR decomposition-based RLS adaptive algorithm and proposes the updated algorithm with the annihilation-reorder look-ahead technology. Chapter 4 discusses the design of the adaptive anti-jamming arrays system based on FPGA and the creation of the hardware plat on which the system runs.