Design And Implementation Of High-Performance Fully Homomorphic Encryption Processor

With the development and popularization of cloud computing and secure multi-party computation,data security and privacy protection related technologies have become increasingly prominent.Fully homomorphic encryption can perform arbitrary operations on ciphertext without a key,which fundamentally solves the problems of data security and privacy protection in the process of cloud computing.Therefore,fully homomorphic encryption has important theoretical significance and application value.The encryption scheme based on Ring Learning With Errors(RLWE)is simple in structure and can resist quantum attacks.This makes cryptography based on the RLWE a hot spot in the field of cryptography.To solve the security problems in the cloud computing process and meet its high throughput requirements,This paper proposes a high performance hardware architecture of fully homomorphic encryption processor based on RLWE.the main research contents of this dissertation are as follows:1.A resource efficient polynomial multiplier with partially parallel structure is designed and implemented.Compared with the serial structure and fully parallel structure,the partial parallel structure can make a trade-off between system throughput and hardware resource overhead;under the premise of less hardware resource overhead,the circuit can achieve a relatively ideal throughput.In addition,we adopt a polynomial multiplication algorithm based on negative wrapped convolution and Number Theoretic Transform(NTT),which greatly reduces the time complexity of polynomial multiplication.Optimize the storage and calculation scheme of twiddle factors,so as to reduce the storage of rotation factors At the same time,in the process of NTT operation and Inverse Number Theoretic Transform(INTT),the data read and write process and calculation process are ping-ponged.Therefore,the read and write cycles is hidden,the delay of the polynomial multiplier is reduced and the throughput of polynomial multiplier is improved.The resource efficiency of the polynomial multiplier designed in this paper has reached 18.52Kbps/ENS.Compared with the existing design,the resource efficiency has increased by 65.8%.2.A high-performance fully homomorphic encryption processor based on RLWE is designed and implemented.The circuit uses a parallel structure with two NTTs and four butterfly modules.Make full use of the multiplier in the butterfly module to parallel the pre-calculation and post-calculation processes.In addition,The ciphertext calculation and NTT calculation are processed in parallel in the encryption process,which reduces the clock cycle of the RLWE encryption processor and improving the throughput of the RLWE encryption processor.In addition,the resource multiplexing control circuit is designed to reuse the multipliers and the modulus modules for calculation.The hardware design is implemented on the FPGA development board,and the experimental results show that the encryption processor designed in this paper has a higher throughput,which is up to 21.69 Mbps in the encryption process and 41.02 Mbps in the decryption process.Compared with the existing RLWE based fully homomorphic encryption processor with the same parameters,the throughput of encryption process has increased by 70.7%,and the throughput of decryption process has increased by 43.6%.