The Design Of 915MHz RF Transceiver Power Amplifier

With the development of wireless communication technology,it put forward higher requirements on the wireless communication equipment.It will have the receiving function,transmitting function and baseband signal prossing function on the monolithic integrate circuit.This can significantly reduce the cost,power consumption and size of the chip.Currently the mainstream technology of digital signal processing is to use the CMOS process,and the mainstream technology of radio and analog signal processing is to use the GeSi and GaAs process.The GeSi and GaAs process have very good performance in higher frequency and noise rejection,but they have the questions that cannot be compatible with digital CMOS process,high cost and cannot implement wireless communication on a single chip.The CMOS radio frequency integrated circuit on the system of the single chip wireless communication has been greatly developed by its advantage of high performance,high integration,good compatibility with digital CMOS process and low cost.Therefore CMOS radio frequency integrated circuits become one of the most popular research fields on this day.This paper introduces the principle of several kinds of commonly used in receiver and transmitter structures,and analyzes the advantage and disadvantages of these structures,uses the link budget tool of the ADS--Budget to simulate and check the overall index and module index of the transceiver.In this paper,we mainly study the RF power amplifier.We else elaborate the functions,index and structure type of the radio frequency power amplifier.We use the program that changing the size of RF power amplifier to achieve variable power gain,and according to the theory of RF power amplifier,we illustrate the design approach and step how to design the CMOS RF power amplifier and its biasing circuit.This paper makes the appropriate changes of the device model,and integrates the ADS simulation tools to the Cadence,and uses ADS and Cadence design tools to complete the simulation verification.Finally this article illustrates the common technique and frequencyly asked questions in the CMOS RF power amplifier layout design,and finishs the work of layout placement and layout drawing.915MHz CMOS RF power amplifier designed in this article use the SMIC 0.13?m RF CMOS process.The size of the chip is 790.76x828.55(?m2),using calibre and spetre to do parameter extraction and post layout simulation.At a 3.3V supply,the power-added-efficiency(PAE)of 36.7%and the output and input 1-dB compression point achieves 11.52dBm and 507.716mdBm.Difference between the fundamental and second harmonic near the 1-dB compression point is 20.26dB,and the output third-order intercept arrives 23.0108dB.The power gain can adjust from 1.65dB to 12.01dB.According to the design method introduced in this paper,this article completes CMOS RF power amplifier design,and all the indicators meet the design requirement.