The Application Of Six-sigma DMAIC In IC Test Cost Reduction

In today’s highly competitive semiconductor market,every semiconductor companies are actively expanding their market share,and focus on their owned product with excellent performance,lower price,high integration,the shortest delivery cycle time and quality after-sales service.Among them,the price war has been the theme of the semiconductor industry.However,the major factors which can support a competitive price are product quality and efficient cost structure,scientific cost management.Increasingly fierce market competition,the quality and cost throughout the existence of contradictory relationship.Every enterprises are greatly keep balance of relationship between quality and cost.Six Sigma management method help us analyze the fundamental problem with the minimum resources to maximize cost savings or improved manufacturing processes.Therefore,it will help to make our product more competitive for market.This thesis focus on the test cost of the semiconductor industry,a common problem in order to improve the test yield of a company representative chip product LS3.This thesis uses the core architecture tool DMAIC Six Sigma quality management method to find the root cause of LS3 test low yield issues.And we development and implement the improvement for this issue,and finally process control for the product after improvement.The thesis use several quality tools flexibly,included fishbone,brainstorming,cause analysis to find the root cause for high failure rate test during measure phase;using the JMP tools to analyze measurement data;use of SPC methods for producing improved process control.Finally,we improved test yield of LS3 products from 88% to 95%,the annual cost saving is $ 627 K and it achieved the company’s Six Sigma goals.The improvement solutions which come out this project will be fan out to the same family of products,to enhance production quality and product competitiveness in the market.