Micro Controller Final Test Yield Improvement Based On DMAIC Methodology

The background of the thesis is freescale is eager to find out a systematic way to improve the final test yield after freescale is spun off from motorola.The major content of thesis is to introduce the promotion of Six Sigma in Freescale semiconductor and discuss the final test improvement. And then, the thesis presents why DMAIC method on the micro controller product in Freescale semiconductor Tianjin factory is needed.The DMAIC method includes define, measure, analyze, improvement and control phases. In the define phase, the team charter, project scope and project goal are finalized. The thesis uses flow chart, Pareto and 20/80 principle to find out top fallout in the final test process. In the measurement phase, the thesis evaluates process capability and current fallout level in the final test process. It provides solid precondition for analysis phase. In the analysis phase, the thesis uses fish-bone chart,FMEA, independence test, normality test, ANOVA, hypothesis test and non-parameter test. Furthermore, it performs SOV analysis based on ANOVA methodology. In the improvement phase, the thesis uses full factorial design to optimize the key factors and uses proportion test to verify the result. It also revises FMEA and finalizes the implementation plan. In the control phase, it recalculates the process capability index to present achievement and uses SPC chart to monitor the stability after improvement.The related optimized actions are documented so that it can consolidate the improvement and provide record for comparison with original project’s goal. Finally,the thesis discusses the challenge of final test improvement and expectation whether the big data mining can be integrated to DMAIC method so that it can benefit the final test yield improvement.