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Investigation On Reliability Optimization Of Resistive Random Access Memory(RRAM) Based On TaO_x

Posted on:2020-11-01Degree:MasterType:Thesis
Country:ChinaCandidate:J YuFull Text:PDF
GTID:2428330575971339Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
The main characteristics of the storage technology in 21st century are:information storage with high capacity and high density;information transmission with super high speed.With the process nodes continue to decrease,the main flash memory in the market is facing problems such as quantum tunneling and capacitive coupling.The new storage technology has become a research hotspot in the field of storage,and is expected to replace the floating gate structure storage technology.Among them,resistive random access memory?RRAM?is one of the most promising next-generation non-volatile memories,which is based on the resistance transition effect.That has the advantages of simple structure,low power consumption,compatible with CMOS processes,and high integration density.The International Semiconductor Technology Roadmap?ITRS?states that "resistive random access memory is one of the new types of storage technologies that are most commercially promising and worth investing heavily in research and development." However,before mass production of resistive memory,there are still some key technical problems to be solved.Such as,the resistance transformation mechanism is not clear,not universal device model;the uniformity is poor,the reliability of the device need to be improved,and the lack of integrated self-selective resistive change devices.In view of the above problems,this paper starts from the reliability of resistive memory,from the research of conductive filament growth kinetics,device process characterization and device programming energy optimization work,and has achieved the following results for reliability optimization:Bi-layer structures have been widely adopted to improve the reliability of conductive bridge resistive random access memory?CBRAM?.In this work,we have proposed a convenient and economical solution to achieve a Ta2O5/TaOx bilayer structure by using a low temperature annealing process.The TaOx layer is used as an external resistor in this structure,and the overflow current is suppressed during the setting programming,thereby achieving adaptive switching.The experimental results show that the resistance distribution in the high resistance state and the low resistance state is improved due to suppression of overshoot.In addition,the LRS retention of the CBRAM is significantly enhanced due to the recovery of defects in the switching film.This work not only provides a simple way to improve the reliability of CBRAM,but also uses materials that are compatible with CMOS processes.The use of different pulse operation modes of the device has a great influence on improving the reliability of the resistive memory.In this work,we propose a pulse programming scheme to improve the durability and uniformity of the high and low resistance states of the TaOy/Ta2O5/TaOx three-layer structure.The device was first characterized by TEM and EDS elemental analysis to verify the structure of the device.According to the failure behavior of the device durability,the physical mechanism of the failure of the device is analyzed.The energy is too high during the reset operation,resulting in a gradual increase in the gap between the filament and the electrode,thereby causing the device to fail.After using a low-energy optimized pulse scheme,the durability of the device is improved,and the stability of the device's high and low resistance states is enhanced.This work not only improves the reliability of the device,but also is fully compatible with the design of the basic pulse transmitting circuit on the hardware circuit system,which can indirectly reduce the peripheral circuit system design cost.In this paper,the main research on the industrialization of resistive random access memory.Based on the above device design and pulse operation experiments,the evolution direction of RRAM devices is determined.The device is optimized and improved from a process point of view and a pulse algorithm to ensure proper programming pulses to ensure the true ability of the RRAM memory to store information.
Keywords/Search Tags:TaO_x, RRAM, Reliability, Low Temperature Annealing, Pulse Energy Optimization
PDF Full Text Request
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