A DSP Serial Interface SPI And SCI Research And Design

DSP technology has been widely used in communications,control,aerospace and other fields,DSP chip as the electronic information industry,the basic components,both from chip design to application development,or related algorithms and other theoretical basis has become mature.However,China is still in the field of catch-up stage,therefore,the design of independent intellectual property rights of domestic commercial DSP chip is of great significance.This topic is focused on a 16-bit fixed-point DSP for industrial control.The chip has a large numbe of peripheral,fast interrupt handling,with a variety of types of memory,is a highly cost-effective general-purpose processor.Chip core using Harvard architecture,extensive use of pipeline,support nearly 100 assembly instructions,CPU operating frequency up to 100M.The core of this paper is to design DSP chip on-chip synchronous serial interface SPI and asynchronous serial interface SCI,through which DSP can easily carry out peripheral expansion,to achieve communication with peripheral devices.According to the requirements of the DSP system,the two peripheral functions are defined to meet the basic functions of communication and satisfy the access of the CPU to its internal registers.Peripheral interruption of the design,making the CPU can be achieved through the interrupt control of peripherals.Serial interface SPI and SCI have the following characteristics:(1)The system can achieve precise access to peripheral registers;(2)Interface to receive and send both have a buffer structure;(3)It is used full synchronous circuit design,using the syste:m clock;(4)With programmable baud rate;(5)The kernel can query and interrupt the two ways to access peripherals.According to the definition of SPI and SCI,based on verilog hardware description language,using full synchronization circuit,sub-module,hierarchical SPI,SCI design,and finally use the nc-verilog tool for SPI,SCI,respectively,modular and system-level simulation verification.Simulation and chip test results show that the design and implementation of the program to achieve the functional requirements,and can be very compatible with DSP systems.