New Algorithm For Memory Partitioning Based On FPGA

To balance high-performance,low-power and time-to-market requirements,field-programmable gate array(FPGA)devices have gained market share over the past two decades relative to ASICs and general-purpose processors.Although FPGAs provide many computational units for parallelism,providing a high-speed data flow required by these units is a significant challenge.The high-level synthesis(HLS)tools has improved the efficiency of FPGA greatly.High-level synthesis tools compile behavioral-level programs written in high-level languages to describe the hardware at the register transfer level(RTL),helping accelerate the design process for very large scale integrated circuits.However,the high-level synthesis method is not omnipotent.Compared with the traditional manual RTL method,the high-level integrated RTL designs automatically produce performance deficiencies.One of the biggest bottlenecks in performance gap is memory.Based on the evolution of various methods for more than 20 years in memory partitioning method,this paper presents a new algorithm for memory partitioning on FPGA.The main work and innovation of this article is as follows:(1)Bank mapping method is optimized.The previous method usually expands the multi-dimensional array directly,which causes the result to vary depending on the size of the array.In this paper,we first propose a multi-dimensional bank mapping method based on linear transformation in order to get rid of the effect of array capacity on the final memory partitioning.After the optimization of the mathematical model,we finally draw a bank mapping method based on the polyhedron model.In addition to the basic cyclic partitioning,it also includes a variety of memory partitioning schemes.(2)Improved method of Intra-bank offset.First of all,this paper introduces a "simple" method of calculating intrabank offset in polyhedron.This method reasonably reduces the storage resources required for partitioning and optimizes the storage address.However,this method will consume too much logical resources.So we explored a new method of memory padding out of physical storage that has the advantage of saving logic address resources and having an acceptable increase in physical overhead.In summary,this paper explores a more efficient,automated memory partitioning method,and experimental verification is performed based on the characteristics of the method.According to the above methods,this work design and implement a high level of integrated automated memory partitioning tool,and it is verified through experiments.