Research And Implementation Of Key Technologies Of MXXXX DSP Compiler

As Digital Signal Processor(DSP)has been widely adopted in aerospace/radar/sonar/communication and domestic appliances,it became a mainly attention in processor industry.For decades,domestic DSP technology developed fast,however,the intellectul property products are in short.In this thesis,MXXXX DSP is a processpr developed by National University of Defense Techonoogy(with independent property right)used for wireless communication,video image processing,etc [1].In order to spread the use of MXXXX DSP,a well-functioned and outperforming software system is needed.While the most important part of a software sets is compiler.In MXXXX,it has a unique and innovative instruction set and architecture,thus,the compiler in the current market cannot meet our requirement.A specialized compiler toolchain must be developed.MXXXX DSP adopts VLIW architecture[2],while the performance of the processor which adopts this architecture relies on the static optimization strategy of compiler.Therefore,performance of compiler determines the performance of processor,especially VLIW architecture processor.In our work,based on MXXXX DSP architecture and instruction set,on an open source compiler GCC platform developing an optimization MXXXX compiler.We settled the incompatibility of the transplant of GCC compiler.In order to enhance the performance of compiler,our main works are as follows:1.Design and implement a supporting approach of 32 bits character and character strings: MXXXX DSP focus on high performance digital processing.As for single byte and double byte,it shows little usage.Thus,we only provide the least access data width 32 bits access instruction without single byte and double byte access instruction.It affects the access towards Char type and Short type access for user applications.Aiming at this problem,thesis implements a supporting approach for 32 bits character and character string in MXXXX compiler.We can support data for small bits width with no performance degradation.2.Implement a manage distribution algorithm of parallel calculating unit: In order to speed the execution efficiency of MXXXX DSP digital processing processor.We adopt multiple calculating parallel execution in our work.For instruction can choose any idle calculating unit under the same operand type,while GCC only supports select calculating unit by operand type,and has no fully consideration of execution state of calculating unit.Thus,instruction parallel execution and pipeline cannot happen.In order to figure out this problem,thesis propose a manage distribution algorithm of parallel calculating unit.Consequently,instruction parallel execution and pipeline execution are settled,enhances the application execute efficiency on MXXXX DSP.3.Implement a delay slot scheduling algorithm based on circulating: A MXXXX DSP utilizes VLIW architecture,supports instruction pipeline execution.For the skip instruction of MXXXX DSP has a big delay,when circulate instruction is executing,the padding of delay slot of skip instruction becomes a key elements to the execute efficiency of circulating application.In this thesis,we based on the feature of MXXXX DSP instruction set,proposing a delay slot scheduling algorithm based on circulating.By this approach,we succeed in padding of branch skip delay slot,highly improve the execution efficiency of circulating application.