| The specialized architectures that allow digital signal processors to excel in performance also make it difficult for high-level language compilers to generate efficient code. The lack of compilers that can exploit the potential of such architectures inhibit the utility of these processors. A general purpose DSP architecture and an optimizing C compiler that can utilize the features of this proposed architecture are presented.;Existing DSP architectures and C compilers are studied to gain insight into the problems encountered when compiling C source code for DSP targets. A compiler and an architecture are then designed concurrently to yield improved system performance. Targeted features include multiply-and-add operations, low overhead looping support, dual data memory ports, and parallel execution of operations. Benchmarks used for testing and evaluation indicate the optimized compiler-generated code makes efficient use of these architectural features. On average, this code performs only 10% slower than optimal hand-coded programs, and is almost three times better than the best commercial system. |
