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Simulation And Testing-analysing Of TDDB Of 65nm Metal Oxide Semiconductor

Posted on:2018-12-14Degree:MasterType:Thesis
Country:ChinaCandidate:T XuFull Text:PDF
GTID:2348330521951547Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
The feature size of the integrated circuit has always become a significance symbol of the performance and the power consumption of the circuit.When the feature size reaches 65 nm,the reliability problem has attracted more and more attention recently.Time Dependent Dielectric Breakdown(TDDB)characteristics of the ultra-thin gate dielectric layer can be used to characterize the lifetime of the device and to discuss the reliability of the device.This paper can be divided into three parts.First,the physical mechanism of TDDB effect and the life model were expounded theoretically.And then,the TDDB characteristics of the device was studied more intuitively by numerical simulation analysis,which can guide the experiments.Before experiment test,we also design the test structure,the layout and the verification.Finally,SMIC 65 nm samples were used to test the experiment,and the results of stress test were used to characterize the breakdown property of the device,investigating the TDDB reliability s in deep submicron transistors with the ultra-thin gate oxide.In addition to the introduction of the background and the multiple physical mechanisms of TDDB life models,we also present the statistical method of life prediction and the usage of the simulation software.The three-dimensional simulation model of the dielectric layer was established based on the MATLAB software,which includes the establishment of the simulation model,the simulation of the accumulation of the defect in the ultra-thin gate dielectric layer and the calculation of the device lifetime.The power-law physical model is used combined with the percolation theory with statistical characteristics in this paper firstly,which gives the three-dimensional defect accumulation simulation.On the basis of the experiment,we found that percolation model was accuracy to a great extent for the MOSFET with gate oxide layer below 2nm.During the test structure and the layout design,the antenna effects can be also considered upon the 65 nm technology,furthermore,the method to shielding antenna effects and corrections,such as DRC and DFM can be also provided.In TDDB experiments,the voltage stress and temperature stress tests were conducted by constant voltage stressed method,and the statistical analysis-Weibull analysis method was employed to analyze the data.Finally,according to the Weibull analysis and TDDB life extrapolation model,we extrapolated the life of this device successfully.In this paper,we presented a new TDDB simulation method and model,at the same time,the feasibility of the method is verified by experiment,which is helpful for the study of the TDDB reliability of MOS devices.
Keywords/Search Tags:ultra-thin oxide, TDDB, percolation, reliability testing, accelerated-stress test
PDF Full Text Request
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