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Analysis Of IBIS And AMI Modeling Validation

Posted on:2018-02-05Degree:MasterType:Thesis
Country:ChinaCandidate:J LiuFull Text:PDF
GTID:2348330521951508Subject:Engineering
Abstract/Summary:PDF Full Text Request
IBIS is a descriptive document for simulation.It describes the electrical characteristics of the device's input and output ports from the behavior of the components.It does not involve the specific circuit structure and the process parameters of the chip.It is easy for semiconductor manufacturers to offer this model to customers without exposing their intellectual property.The IBIS model is a data list consisting of the electrical parameters of the device,which can reflect the characteristics of device switching speed and driving capability.The core of the studied IBIS model is the buffer model,that is,when the IBIS model is created,the study object is a buffer model.The behavioral characteristics of the IBIS buffer model mainly describe some V/I and V/t curves.The output impedance of the buffer is represented by the V/I curve,and the high and low conversion characteristics are expressed by the V/t curve.In the acquisition of modeling data,usually according to the transistor-level HSpice and other documents through the EDA manufacturers to meet the IBIS-compliant simulation software to convert,this simulation through the modeling data,high accuracy,and from outside conditions influences.As the speed of high-speed serial signal continues to increase,the amplitude is getting smaller,for more than 1GHz signal amplitude attenuation is relatively large,the receiver may not see an "open" eye.For processing high-speed serial signal need to send the signal at the sending end of the signal pre-emphasis processing,for more than 5GHz signal also need to balance the signal at the receiving end.For the traditional IBIS model,we cannot achieve the pre-emphasis and equalization operation,but we want to preserve the characteristics of the traditional IBIS model behavior level model,so it is important to study the IBIS+AMI model.The algorithm model interface(AMI)defines the standard syntax for high-speed physical layer serial interface modeling,which also uses a behavioral approach to emulate high-speed serial interfaces.AMI further simplifies the I/O buffer model,while increasing the complexity of the balanced circuit function.From the model structure,the traditional IBIS model contains only one.ibs file,which includes the V/t and V/I characteristic curves.In addition to including the.ibs file,the IBIS-AMI model includes the.ami and.dll files,where.ami describes the interface relationships between the dynamic link library and the Electronic Design Automation(EDA)tool in terms of common and model-specific parameters;.dll file is dynamic library that.ami model to achieve pre-emphasis and other functions compiled.When performing AMI expansion,the IBIS specification divides the serial-to-parallel converter's modeling into two parts: the analog part and the algorithm part.The simulation part of the Ser Des model is assumed to be a linear time-invariant system and consists of a terminal consisting of a resistor,a capacitor,or an inductor.The algorithm part of the Ser Des model contains circuit parts such as equalizers,clock recovery,etc.The transmit(TX)and receiver(RX)algorithm models contain any behavioral equalization circuits that may exist,such as Forward Feedback Equalization(FFE)or Decision Feedback Equalization(DFE).This thesis first introduces the design purpose and composition of IBIS,and then studies the modeling technology of IBIS.Taking the relevant SERDES devices such as USB3.0 as an example,this thesis introduces the acquisition and use of I/V and V/T related data,and verifies that the model is correct;then demonstrating the structure and working principle of IBIS-AMI,and the application of equalization technology in AMI;and then the USB3.0 Transmitter(TX)and Receiver(RX)for AMI core of the receiver is a Continuous Time domain Linear Equalizer(CTLE),which is based on the zero-pole configuration of the transfer function model,which is modeled as a configurable FFE AMI model in Sigrity AMI Builder by analyzing the de-emphasis feature of the sender,and other auxiliary circuits are programmed with C code.Finally,the Sigrity AMI Builder is compiled into a custom CTLE AMI model and the relevant verification is done using time domain and channel simulation analysis.
Keywords/Search Tags:IBIS model, IBIS-AMI modeling, high-speed SI simulation, equalization
PDF Full Text Request
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