Key Technologies For CMOS Analog Front-End Transmitter Used In The Powerline Communication

Power Line Communication(PLC)is a communication mode,using power lines as a transmission medium.Power lines,having no need to rewire and reducing the cost of rebuilding the communication system,can greatly reduce the cost of communication.Power line cabling extends across the country,benefiting residents from all parts of the country,and is easy to use,plug and play.Due to these advantages of power line communication technology,the research on it has been deepened in recent years.It makes narrowband power line communication applied to meter collection and other systems,but there are a number of technical bottlenecks to break through for the smart home.With the high speed development of CMOS integrated circuit technology,the design of high quality power line communication chip to ensure high quality and reliability of power line communication,is gradually getting everyone's attention.According to the needs of the project,this thesis studies the analog front-end transmitter of broadband power line communication.Two of the key modules are designed :digital-to-analog converters(DAC)and line drive circuits.This thesis introduces various performance indexes and common structures of digital-to-analog converters,and points out the advantages and disadvantages of various structures.The thesis designs a 10-bit segmented current steering DAC to convert the digital signal into an analog signal.The 6 MSB are thermometer coding and the 4 LSB are binary coding,and the sampling rate of DAC can reach 100 MHz.A simple and practical limiter latch is proposed in the DAC to reduce the input voltage amplitude from 5V to 1.5V,reducing the effect of clock feedthrough and improving the overall performance of the DAC.Then,the traditional single differential pair input stage of the amplifier is described,and the shortcomings of the input common mode range are pointed out.The complementary differential pair circuit is designed as the input stage,and the range of the input common mode is expanded.Three different output amplifiers are described,and the AB output stage is designed,based on their respective advantages and disadvantages.It provides a large current and a strong driving capability for the load.The thesis is based on SMIC0.18 ?m-3.3V CMOS process model for simulation verification.The DAC settling time is 5.887 ns,the INL is ± 0.7LSB and the DNL is between ± 0.4LSB.The SFDR of the DAC reaches 74.4d B when the sampling frequency is 100 MHz and the input signal is a sine with a frequency of about 1MHz.When the input signal is a sinusoidal signal with a frequency of about 10 MHz,the SFDR reaches 73.8d B.Even if the input signal is a frequency close to 50 MHz sine wave,the DAC's SFDR still reached 72.8d B.The simulation results of line drive circuit are that:the common mode input range of 0.55 V to 2.75 V,the differential input voltage swing of-2.2V to 2.2V,the differential output voltage swing of-4.4V to 4.4V,the setting time of 7.89 ns,the positive conversion rate of 2.694V/ns,the negative conversion rate of 3.084V/ns.When the input signal of analog front-end transmitter used in the overall power line is a sinusoidal signal with a frequency of about 1MHz,the ENOB of the output signal is about 9.52 bit.So the circuit meets the design requirements of analog front-end transmitter for broadband power line.